SD卡与TF卡的引脚定义
December 2007 Rev 31/61
512 MByte and 1 GByte, 3.3V Supply Secure Digital? Card
Features
■SD Memory Card Specification Version 1.01-compliant
■Up to 1 Gbyte of Formatted Data Storage ■
Bus Mode
–SD Protocol (1 to 4 Data Lines)–SPI Protocol
■
Operating Voltage Range:
–Basic Communication (CMD0, CMD15, CMD55 and ACMD41): 2.0V to 3.6V
–Other C ommands a nd M emory A ccess: 2.7V to 3.6V ■Variable Clock Rate: 0 to 25 MHz ■Read Access (using 4 Data Lines)–Sustained Multiple Block: 6.3 Mb/s ■Write Access (using 4 Data Lines)–Sustained Multiple Block: 3.0 Mb/s ■Maximum Data Rate with up to 10 Cards ■Aimed at Portable and Stationary Applications ■
Communication Channel Protocol Attributes:–Six-wire communication channel (clock, command, 4 data lines)–Error-proof data transfer
–Single or Multiple block oriented data transfer
■Memory Field Error Correction ■Safe Card Removal during Read
■Write Protect Feature using Mechanical Switch ■Built-in Write Protection Features (Permanent and Temporary)
■
SD, MiniSD and MicroSD Packages –ECOPACK ? compliant –Halogen free –Antimony free
MicroSD
Table 1.
Device summary
Part Number Package Form Factor Operating Voltage Range
SMS128AF SD (full size)
2.7V to
3.6V
SMS256AF SMS512AF SMS01GAF SMS064BF MiniSD SMS128BF SMS064FF MicroSD
SMS128FF SMS256FF SMS512FF
https://www.sodocs.net/doc/d211674677.html,
Description SMSxxxAF, SMSxxxFF, SMSxxxBF
1 Description
The Secure Digital Memory Card (SD Memory Card) is a Flash-Based Memory Card. It is specifically designed to meet the security, capacity, performance and environmental
requirements of the latest-generation audio and video consumer electronic devices, that is mobile phones, digital cameras, digital recorders, PDAs, organizers, electronic toys, etc. The Secure Digital Memory Card is a high-mobility, high-performance, low-cost and low-power consumption device that features high data throughput at the memory card interface. It includes a copyright protection mechanism that complies with the security of the SDMI (Secure Digital Music Initiative) standard. The Secure Digital Memory Card security system uses mutual authentication and a “cipher algorithm” that protects the card from illegal use. Unsecured access to the user's personal content is also available.
The Secure Digital Memory Cards have an advanced communication interface designed to operate in a low voltage range. The full-size Secure Digital Memory Card has a 9-pin interface whereas the Mini Secure Digital Memory Card has a 11-pin interface but can be fitted with a 9-pin adapter. Only the 9-pin interface is described in this document. The MicroSD Memory Card has an 8-pin interface, and can also be fitted with a 9-pin adapter.Table 2,T able 3,Table 4,Table 5, and Table 6 give an overview of the Secure Digital Memory Card features.
In order to meet environmental requirements, the devices are offered in ECOPACK ?
packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
The SD, MiniSD and MicroSD packages are also Halogen free and Antimony free.
Related documentation
●Secure Digital Memory Card Specifications: Part 1 Physical Layer Specification, Version 1.01
●MiniSd Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1 Physical layer Specification, Version 1.02
●
MicroSD Memory Card Specifications: Addendum to SD Memory Card Specifications Part 1, Physical Layer Specification, Version 1.00
Table 2.
System performance
System performance
Max.Typ.
Unit Sleep to Ready
30
μs Sustained Multiple Block Read (1)1.43X, 20X, 12X and 5X Speed grade markings where 1X = 150 KBytes/s.
6.3 (43X)MBytes/s Burst Single Block Read (1) 1.8 (12X)MBytes/s Sustained Multiple Block Write (1) 3.0 (20X)MBytes/s Burst Single Block Write (1)0.8 (5X)
MBytes/s Power-up to Ready
150
ms
SMSxxxAF, SMSxxxFF, SMSxxxBF
Description
Table 3.
Power consumption (1)
1.T A = 25°C, V DD = 3.6V.
Mode
Max. Current Consumption
Standby 200 μA Read 30 mA Write
30 mA
Table 4.
Environmental specifications (1)
1.NA = Not Applicable; RH = Relative Humidity; ESD = ElectroStatic Discharge
Environmental specifications Operating Non-Operating T emperature
? 25°C to 85°C ? 40°C to 85°C Humidity (non- condensing)
NA 85°C - 85%RH
ESD
Protection
Contact Pads
NA
±4kV , Human body model according to ANSI EOS/ESD-S5.1-1998
Other
±8kV (coupling plane discharge)
±15kV (air discharge) Human body model per
IEC61000-4-2Salt Water Spray NA T A = 35 °C 3% NaCl (MIL Std Method 1009)
Vibration (peak-to-peak)NA 15 Gmax Shock
NA
1,000G Drop NA
2000G
Bending
20N (middle of the card)20N (border of the card)UV light exposure
254nm, 15Ws/cm2
Table 5.
Physical dimensions
Parameter SD MiniSD MicroSD Unit Width 2420 11
mm
Height
32
21.5
15 mm Thickness 2.1 1.4
Inter Connect Area 0.7±0.1
mm
Max. Card Thickness 0.95 Max. Pull Area
1.0±0.1
Weight Approx. 2
Approx. 1
<1g Number of Pins
9
11
8
N/A
Description
SMSxxxAF, SMSxxxFF, SMSxxxBF
Table 6.
System reliability and maintenance
MTBF (1)
1.MTBF = Mean Time Between Failures.
>1,000,000hrs
Preventive Maintenance None
Data Reliability 1 non-recoverable bit in 1014 bit read Endurance
>2,000,000 Program/Erase Cycles
SMSxxxAF, SMSxxxFF, SMSxxxBF Memory array partitioning
2 Memory array partitioning
The basic unit of data transfer to/from the SD Memory Card is the Byte. The memory array is divided into several structures as described below and summarized in Table 17.
Block
The Block is the unit structure related to block-oriented read and write commands. Its size is the number of Bytes that are transferred when a block-oriented read or write command is sent by the host. The SD Memory Card Block size is either programmable or fixed. The information about allowed block sizes and programmability is stored in the CSD Register. The details of the Memory Array Structure and the number of addressable Blocks are shown in T able 17.
Sector
The sector is the unit structure related to the erase commands. Its size is the number of blocks that are erased at any one time. The sector size is fixed for each device. The information about the sector size (in blocks) is stored in the CSD register.
Write Protect Group (WP-Group)
The WP-Group is the smallest structure that may be individually protected. Its size is the number of Sectors that are Write Protected with one bit. The information about the Write Protect Group size is stored in the CSD Register.Table 7.
Memory array structures
Type of Structure Number of structures in device
Unit 32 MByte Devices 64 MByte Devices 128 MByte Devices 256 MByte Devices 512 MByte Devices 1 GByte Devices Blocks 512 Bytes 5977612262424832049971210024961999872Sector Block 128128128128128128WP-Groups
Sector
1
2
4
8
16
32
Memory array partitioning SMSxxxAF, SMSxxxFF, SMSxxxBF
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
3 Secure digital memory card interface
This section applies to the full-size SD Memory Card only, or to the MiniSD and MicroSD card when used with an adapter.
Details on the 11-pin communication interface of the MiniSD card used without an adapter are still to be announced. Figure 3: MicroSD pin assignment shows the MicroSD pinout.The Secure Digital Memory Card has an advanced 9-pin communication interface (Clock, Command, 4 Data pins and 3 Power Supply pins) designed to operate in a low voltage range. The Secure Digital Card has its nine pins exposed on one side (see Figure 2). The signal/pin assignments are listed in Table 8 The pin types are Power Supply, Input, Output and Push-Pull. The signals include six communication lines CMD, DAT0, DAT1, DAT2, DAT3, CLK and three supply lines V DD , V SS1 and V SS2.
Table 8.
Full-size SD Memory Card pin assignment
Pin #
SD mode
SPI mode
Name
Type (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.
Description
Name Type Description
1CD/DA T3(2)
2.The extended DAT lines (DAT1-DAT3) are input on power-up. They start to operate as DAT lines after SET_BUS_WIDTH
command.I/O/PP (3)
3.After power-up this line is input with 50kW pull-up (can be used for card detection or SPI mode selection). The pull-up
should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.
Card Detect / Data Line [Bit 3]CS I Chip Select (active Low)2CMD PP Command/Response DI I Data In
3V SS1S Supply voltage ground V SS S Supply voltage ground 4V DD S Supply voltage V DD S Supply voltage 5CLK I Clock
SCLK I Clock
6V SS2S Supply voltage ground V SS2S
Supply voltage ground
7DA T0I/O/PP Data Line [Bit 0]DO
O/PP Data Out
8DA T1(2)I/O/PP Data Line [Bit 1]Reserved 9
DA T2(2)
I/O/PP
Data Line [Bit 2]
Reserved
Secure digital memory card interface
SMSxxxAF, SMSxxxFF, SMSxxxBF
Table 9.
MicroSD Contact Pad Assignment
Pin SD Mode
SPI Mode
Name Type (1)1.S: power supply; I: input; O: output using push-pull drivers; PP: I/O using push-pull drivers.
Description Name Type
Description
1 DA T
2 I/O/PP Data Line [Bit 2] RSV Reserved
2
CD/DA T3(2)
2.The extended DAT lines (DAT1-DAT3) are input on power up. They start to operate as DAT lines after SET_BUS_WIDTH command. The Host shall keep its own DAT1-DAT3 lines in input mode, as well, while they are not used. It is defined so, in order to keep compatibility to MultiMediaCards.I/O/PP (3)
3.After power up this line is input with 50KOhm pull-up (can be used for card detection or SPI mode
selection). The pull-up should be disconnected by the user, during regular data transfer, with SET_CLR_CARD_DETECT (ACMD42) command.
Card Detect / Data Line
[Bit 3]
CS
I
Chip Select (neg true)
3 CMD PP Command/Response DI I Data In
4 V DD
S Supply voltage
V DD S Supply voltage 5 CLK I Clock SCLK I Clock 6 V SS
S
Supply voltage ground
V SS S
Supply voltage ground
7 DA T0 I/O/PP Data Line [B it 0] DO
O/PP Data Out
8 DA T1
RSV
Reserved
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
3.1 Secure digital memory card bus topology
The Secure Digital Memory Card system defines two alternative communications protocols:
SD and SPI that correspond to two operating modes.
Either mode can be selected in the application, mode selection is transparent to the host.
The host automatically detects the operating mode of the card by issuing the Reset
command (refer to Section7.2.1: Mode Selection) and will expect all further
communications to use the same mode. Therefore, applications that use only one
communication mode do not have to be aware of the other.
The SD bus includes the following signals:
●CLK: Host to card clock signal
●CMD: Bi-directional Command/Response signal
●DAT0 - DAT3: 4 Bi-directional data signals.
●V DD, V SS1, V SS2: Power and ground signals.
The SD Memory Card bus has a synchronous star topology (refer to Figure4: Secure Digital
Memory Card system bus topology) with a single master (the application) and multiple
slaves (the cards). The Clock, power and ground signals are common to all cards. The
command (CMD) and data (DAT0 - DAT3) signals are dedicated to the cards, they provide
continuous point-to-point connection to all the cards.
During the initialization process, commands are sent to each card individually, allowing the
application to detect the cards and assign logical addresses to the physical slots. Data is
always sent (received) to (from) each card individually. However, in order to simplify the
handling of the card stack, after the initialization process, all commands may be sent
concurrently to all cards. Addressing information is provided in the command packet.
The SD bus allows dynamic configuration of the number of data lines. After power-up the SD
Memory Card defaults to using only DAT0 for data transfer. After initialization the host can
change the bus width (number of active data lines). This feature is an easy trade off between
hardware cost and system performance.
Secure digital memory card interface
SMSxxxAF, SMSxxxFF, SMSxxxBF
1.DAT1 and DAT2 not connected.
3.2 SD bus protocol
Communication over the SD bus is based on command and data bit streams which are
initiated by a start bit and terminated by a stop bit.
●
Command: a command is a token which starts an operation. A command is sent from the host either to a single card (addressed command) or to all connected cards (broadcast command). Commands are transferred serially on the CMD line. See Figure 5: "No Response" and "No Data" operations .The Command token format is shown in Figure 8
●
Response: a response is a token which is sent from an addressed card, or
(simultaneously) from all connected cards, to the host, as an answer to a previously received command. Responses are transferred serially on the CMD line. A response is illustrated in Figure 5: "No Response" and "No Data" operations .The Response token format is shown in Figure 9
●
Data: data can be transferred from the card to the host or from the host to the card. Data is transferred via the data lines. See Figure 6: (Multiple) Block Read operation for an illustration.
The Data Packet format is shown in Figure 10
Card addressing is implemented using a session address assigned to the card during the initialization phase (See SD Memory Card Specification, Chapter 4). The basic transaction on the SD bus is the command/response transaction. In this type of bus transactions, the information is directly transferred within the command or response structure. In addition, some operations have a data token. Data transfers to/from the SD Memory Card are done in blocks. Data blocks are always followed by CRC bits.
Single and Multiple Block operations are supported. Note that the Multiple Block operation mode improves the speed of write operations. A Multiple Block transmission is terminated by issuing a STOP_TRANSMISSION command on the CMD line (See Figure 6 and Figure 7).
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface Data transfer can be configured by the host to use single or multiple data lines (provided that
the card supports this feature).
A busy signal on DAT0 is used to indicate that a Block Write operation is ongoing (see
Figure7). The same busy signaling is used regardless of the number of data lines used to
transfer the data.
Response tokens (see Figure9) have four coding schemes depending on their content. The
token length is either 48 or 136 bits (See SD Memory Card Specification, Chapter 4.5 for
detailed definitions of the commands and responses). The CRC protection algorithm for
data block is a 16-bit CCITT polynomial (see SD Memory Card Specification, chapter 4.5).
On the CMD line, the MSB bit is transmitted first and the LSB bit last. When the wide bus
option is used, the data is transferred 4 bits at a time (refer to Figure10). Start bits, End bits
and CRC bits, are transmitted on all the DAT lines used. CRC bits are calculated and
checked for every DAT line individually. The CRC status response and Busy indication are
sent by the card to the host on DAT0 only (DAT1-DAT3 are Don’t Care).
Secure digital memory card interface SMSxxxAF, SMSxxxFF, SMSxxxBF
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
3.3 SD Memory Card Functional Description
All communications between the host and the cards are controlled by the host (master). The host sends commands of two types:
●Broadcast commands which are intended for all cards. Some of these commands require a response.
●
Addressed (point-to-point) commands that are sent to the addressed card and are followed by a response from the card.
3.4 Operation Modes
Figure 11 and Figure 12 show an overview of the command flow for the Card Identification
mode and the Data Transfer mode, respectively.
Table 10 shows the relationship between operation modes and card states. Each state in the SD Memory Card state diagram (see Figure 16 and Figure 17) is associated with one operation mode.
Table 10.
Card States vs. Operation Modes
Card state
Operation mode
Inactive State Inactive
Idle State Card Identification Mode
Ready State Identification State
Secure digital memory card interface
SMSxxxAF, SMSxxxFF, SMSxxxBF
3.4.1 Card Identification Mode
The host enters the Card Identification mode after reset and remains in this mode until it has
finished searching for new cards on the bus.
Cards enter the Card Identification mode after reset and remain in this mode until they receive the SEND_RCA command (CMD3) (or the SET_RCA command for MultiMediaCards).
While in Card Identification mode the host resets all the cards that are in Card Identification mode, validates the operation voltage range, identifies every card and asks them to publish their Relative Card Addresses (RCA). This operation is done separately for each card on its own CMD line. In this mode, all data communications use the command line (CMD) only.The host starts the card identification process at the identification clock rate f OD . The SD Memory Card has push-pull CMD line output drives.
Once the bus has been activated the host asks each card to send their valid operation conditions (ACMD41 preceded by APP_CMD - CMD55 with RCA=0000h).
The response to ACMD41 is the Operation Condition Register of the card. The same command is sent to all the new cards in the system. Incompatible cards are switched to Inactive State.
The host then issues the ALL_SEND_CID command (CMD2), to every card to get their unique card identification (CID) numbers. All unidentified cards (which are in Ready State) answer by sending their CID numbers (on the CMD line) and switch to the Identification State. Then the host issues a CMD3 (SEND_RELATIVE_ADDR) command to ask the cards to publish a relative card address (RCA). The RCA is shorter than the CID, and will be used to address the card (typically at a clock rate higher than f OD ) once this is in Data Transfer mode. Once the RCA is received the card state changes to Standby. At this point, the host may ask the card to publish another RCA number by sending another
SEND_RELATIVE_ADDR command to the card. The last published RCA is the actual RCA of the card.
The host repeats the identification process, that is the cycles with CMD2 and CMD3, for each card in the system. Once all the SD Memory Cards have been initialized, the host initializes the MultiMediaCards that are in the system (if any) by issuing CMD2 and CMD3 as explained in the MultiMediaCard specification. Note that in the SD system all the cards are connected separately so each MultiMediaCard has to be initialized individually.
Stand-by State Data Transfer Mode
T ransfer State Sending-data State Receive-data State Programming State Disconnect State
Table 10.
Card States vs. Operation Modes (continued)
Card state
Operation mode
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
3.4.2 Data Transfer Mode
Cards enter the Data Transfer mode once their Relative Card Addresses (RCA) have been
published.
The host enters the Data Transfer mode after identifying all the cards on the bus.
The host issues SEND_CSD (CMD9) to obtain the contents of the Card Specific Data (CSD)
Register for each card. The CSD Register contains information like the block length and the
card storage.
Until the host knows the contents of all the CSD Registers, the f PP clock rate must remain at
f OD because some cards may have operatin
g frequency limitations.
The broadcast command SET_DSR (CMD4) configures the driver stages of all identified
cards. It programs their Driver Stage Registers (DSR) according to the application bus
layout (length), the number of cards on the bus and the data transfer frequency. The clock
rate is changed from f OD to f PP at that point. The SET_DSR command is an option for the
card and the host.
CMD7 is used to select one card and switch it to the Transfer State. Only one card can be in
Transfer State at a given time. If a previously selected card is still in Transfer State when the
host uses CMD7 to switch another card to the Transfer state, then the connection between
the previously selected card and the host is released and the card reverts to the Standby
State.
Secure digital memory card interface SMSxxxAF, SMSxxxFF, SMSxxxBF
When CMD7 is issued with the reserved relative card address "0000h", all cards revert to the Standby State. This function may be used before identifying new cards, to avoid
resetting already registered cards. When in Standby state the cards that already have an RCA do not respond to identification commands (CMD41, CMD2, CMD3).
Note that a card is deselected when it receives a CMD7 with an RCA that does not match. Card deselection is automatic if another card in a system is selected and the cards share the same CMD lines.
So, in an SD Memory Card system, the host may either have a common CMD line for all SD Memory Cards (in which case card deselection is automatic just like in a MultiMediaCard system) or the host may have separate CMD lines, in which case it must be aware of the necessity of deselecting cards.
All data communications in the Data Transfer Mode are point-to point between the host and the selected card (using addressed commands). All addressed commands are acknowledged by a response on the CMD line.
The relationships between the various states in the Data Transfer mode are summarized below (see Figure 12):
●
All Data Read commands (CMD17, CMD18, CMD30, CMD56, ACMD51) can be
aborted at any time using the Stop command (CMD12). The data transfer will terminate and the card will return to the T ransfer State.
●
All Data Write commands (CMD24,CMD25, CMD26, CMD27, CMD42, CMD56) can be aborted at any time using the Stop command (CMD12). The write commands must be stopped prior to deselecting the card using CMD7.
●
As soon as the data transfer has completed, the card switches from the Data Write state to either the Programming state (if the transfer was successful) or the T ransfer state (if the transfer failed).
●If a Block Write operation is stopped and the block length and CRC of the last block are valid, the data will be programmed.
●
The card can provide buffering during Block Write. This means that the data to be
programmed to the next block can be sent to the card while the previous block is being programmed.
If all write buffers are full, the DAT0 line will remain Low (BUSY) as long as the card is in the Programming state (see Figure 12).
●
There is no buffering option for Write CSD, Write CID, Write Protection and erase. This means that while the card is busy with any one of these commands, no other Data Transfer command will be accepted. The DAT0 line will remain Low as long as the card is busy and in the Programming state.
●Parameter Set commands (CMD16, CMD32, CMD33) are not allowed while the card is programming.
●Read commands are not allowed while the card is programming.
●
Switching another card from the Standby to the Transfer state (using CMD7) will not terminate erase and programming operations. The card will switch to the Disconnect state and release the DAT line.
● A card in the Disconnect state can be reselected using CMD7. The card will then revert to the Programming state and reactivate the busy signaling.
●
Resetting a card (using CMD0 or CMD15) will terminate any pending or ongoing
programming operation. This may result in the loss of card contents. It is up to the host to prevent possible data loss.
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
3.5 Commands
Four types of commands are used to control the SD Memory Card:
1.Broadcast commands (bc), no response: The broadcast feature is available only if
all the CMD lines are interconnected at the level of the host. If they are not
interconnected then each individual card will accept the command in turn.
2. Broadcast commands with response (bcr): Since there is no Open Drain mode in
SD Memory Cards, this type of command is used only if the host does not use a
common CMD line. The command is accepted by every individual Card and the
responses from all cards are sent simultaneously.
3. addressed (point-to-point) commands (ac): There is no data transfer on DAT.
4. addressed (point-to-point) data transfer commands (adtc): There is a data transfer
on DAT.
All commands have a fixed code length of 48 bits for a transmission time of 2.4μs at 20MHz.
All commands and responses are sent over the CMD line of the SD Memory Card.
Command transmission always starts with the most significant bit (MSB) of the command
codeword. All commands are protected by a CRC. All Command codewords are terminated
by the end bit (always '1'). T able11 shows the command format. All commands and their
arguments are specified in the SD Memory Card Specification.
Secure digital memory card interface SMSxxxAF, SMSxxxFF, SMSxxxBF
Table 11.
SD Card Command Format
3.6 Responses
All responses are sent via the command line CMD. Response transmission always starts with the leftmost bit of the response codeword. The code length depends on the response type. A response always starts with a start bit (always '0'), followed by the bit indicating the direction of transmission (from card = '0').
A value denoted by 'X' in T able 12,Table 13,T able 14 and Table 15 indicates a variable entry.
All responses (except for R3 Responses) are protected by a CRC. All response codewords are terminated by the end bit (always '1').
There are five types of responses. Their formats are defined as follows:1.
R1 (normal response command): the code length is 48 bits. Bits 45 to 40 indicate the index of the command to respond to. The index is a binary coded number (between 0 and 63). The status of the card is coded in 32 bits (see Table 12).
Note that if data transfer to the card takes place, then a busy signal may appear on the data line after the transmission of each block of data. The host has to check for busy after data block transmission. 2.
R1b is identical to R1 with an optional busy signal transmitted on the data line. The card may become busy after receiving these commands, depending on the state it was in prior to receiving the command. The Host has to check for busy in the response.3.
R2 (CID, CSD Register): the code length is 136 bits. The contents of the CID Register are sent as a response to the CMD2 and CMD10 commands. The contents of the CSD Register are sent as a response to CMD9. Only the bits [127...1] of the CID and CSD Registers are transferred, the reserved bit [0] of these registers is replaced by the end bit of the response (see Table 13).
4. R3 (OCR register): the code length is 48 bits. The contents of the OCR register are sent as a response to ACMD41 (see Section Table 14. on page 25).
5.
R6 (Published RCA response): the code length is 48 bits. Bits 45 to 40 indicate the index of the command to respond to. In this case it is '000011' (together with bit 5 in the status bits it means = CMD3) as shown in Table 15 The 16 MSB bits of the argument field are used for the Published RCA number.
For more details about Response formats, please refer to the SD Memory Card Specification.
Bit position 474645:4039:87:10Width 1163271Value '0''1'x x x '1'Description
Start bit
T ransmission
bit
Command index
Argument
CRC7
End bit
SMSxxxAF, SMSxxxFF, SMSxxxBF Secure digital memory card interface
Table 12.
Response R1
Table 13.
Response R2
Table 14.
Response R3
Table 15.
Response R6
Bit Position 4746[45:40][39:8][7:1]0Width (bits)1163271Value ‘0’‘0’X X X ‘1’Description
Start Bit
Transmission
Bit
Command Index
Card Status
CRC7
End Bit
Bit Position 135134[133:128]
[127:1]0Width (bits)1161271Value ‘0’‘0’
‘111111’X ‘1’Description
Start Bit
Transmission Bit
Reserved
CID or CSD register incl. internal CRC7
End Bit
Bit Position 4746[45:40][39:8][7:1]0Width (bits)1163271Value ‘0’‘0’‘111111’X ‘111111’‘1’Description
Start Bit
Transmission
Bit
Reserved
OCR Register
Reserved
End Bit
Bit Position 4746[45:40][39:8] Argument Field [7:1]0Width (bits)116161671Value ‘0’‘0’X X X X ‘1’Description
Start Bit
T ransmissio
n Bit
Command Index (‘000011’)
New published RCA [31:16] of the card
[15:0] Card Status Bits: 23, 22, 19 and 12 to 0
CRC7
end bit
SD memory card hardware interface SMSxxxAF, SMSxxxFF, SMSxxxBF 4 SD memory card hardware interface
4.1 SD memory card bus circuitry
Figure13 shows the internal bus circuitry required for the Full Size SD Memory Card.
The SD Memory Card may also feature two additional contacts, that are not part of the
internal circuitry. When present in the device, these contacts are located at the level of the
Write Protect/Card Detect switch in the socket, and should be connected as illustrated in
Figure13.
When DAT3 is used for card detection, the R DAT resistor connected to DAT3 should be
disconnected and another resistor should be connected to Ground.
R DAT and R CMD are pull-up resistors used to protect the DAT and CMD lines, respectively,
against bus floating when no card is inserted or when all card drivers are high impedance.
R WP is used to protect the Write Protect/Card Detection switch.
sd卡引脚定义及命令
sd卡引脚定义及命令 2011-05-12 15:32 682人阅读评论(0) 收藏举报SD卡引脚定义： 针脚名称类型描述 1 CD DAT3 I/O/PP 卡监测数据位3 2 CMD PP 命令/回复 3 Vss S 地 4 Vcc S 供电电压 5 CLK I 时钟 6 Css2 S 地 7 DAT0 I/O/PP 数据位0 8 DAT1 I/O/PP 数据位1 9 DAT2 I/O/PP 数据位2 SD卡接口标准规范 SD卡上所有单元由内部时钟发生器提供时钟。接口驱动单元同步外部时钟的DAT和CMD 信号到内部所用时钟。本卡由6线SD卡接口控制，包括：CMD,CLK,DAT0-DAT3。在多SD卡垛叠中为了标识SD卡，一个卡标识寄存器(CID)和一个相应地址寄存器（RCA）预先准备好。一个附加的寄存器包括不同类型操作参数。这个寄存器叫做CSD。使用SD卡线访问存储器还是寄存器的通信由SD卡标准定义。卡有自己的电源开通检测单元。无需附加的主复位信号来在电源开启后安装卡。它防短路，在带电插入或移出卡时。无需外部编程电压。编程电压卡内生成。SD卡支持第二接口工作模式SPI。如果接到复位命令（CMD0）时，CS信号有效（低电平），SPI模式启用。 sd卡接口规范(完整规范标准) 特性：◎容量：32MB/64MB/128MB/256MB/512MB/1GByte◎兼容规范版本1.01◎卡上错误校正◎支持CPRM◎两个可选的通信协议：SD模式和SPI模式◎可变时钟频率0－
25MHz◎通信电压范围：2.0-3.6V工作电压范围:2.0-3.6V◎低电压消耗：自动断电及自动睡醒，智能电源管理◎无需额外编程电压◎卡片带电插拔保护◎正向兼容MMC卡◎高速串行接口带随即存取－－－支持双通道闪存交叉存取－－－快写技术：一个低成本的方案，能够超高速闪存访问和高可靠数据存储－－－最大读写速率：10Mbyte/s◎最大10个堆叠的卡（20MHz,Vcc=2.7-3.6V)◎数据寿命：10万次编程/擦除◎CE和FCC认证◎PIP封装技术◎尺寸：24mm宽×32mm长×1.44mm厚本SD卡高度集成闪存，具备串行和随机存取能力。可以通过专用优化速度的串行接口访问，数据传输可靠。接口允许几个卡垛叠，通过他们的外部连接。接口完全符合最新的消费者标准，叫做SD卡系统标准，由SD卡系统规范定义。SD卡系统是一个新的大容量存储系统，基于半导体技术的变革。它的出现，提供了一个便宜的、结实的卡片式的存储媒介，为了消费多媒体应用。SD卡可以设计出便宜的播放器和驱动器而没有可移动的部分。一个低耗电和广供电电压的可以满足移动电话、电池应用比如音乐播放器、个人管理器、掌上电脑、电子书、电子百科全书、电子词典等等。使用非常有效的数据压缩比如MPEG，SD卡可以提供足够的容量来应付多媒体数据。 SD卡上所有单元由内部时钟发生器提供时钟。接口驱动单元同步外部时钟的DAT和CMD 信号到内部所用时钟。 本卡由6线SD卡接口控制，包括：CMD,CLK,DAT0-DAT3。 在多SD卡垛叠中为了标识SD卡，一个卡标识寄存器(CID)和一个相应地址寄存器（RCA）预先准备好。 一个附加的寄存器包括不同类型操作参数。
SD卡标准及规范
特性： ◎兼容规范版本1.01 ◎卡上错误校正◎支持CPRM ◎两个可选的通信协议：SD模式和SPI模式 ◎可变时钟频率0－25MHz ◎通信电压范围：2.0-3.6V 工作电压范围:2.0-3.6V ◎低电压消耗：自动断电及自动睡醒，智能电源管理 ◎无需额外编程电压◎卡片带电插拔保护 ◎正向兼容MMC卡◎高速串行接口带随即存取 －－－支持双通道闪存交叉存取 －－－快写技术：一个低成本的方案，能够超高速闪存访问和高可靠数据存储－－－最大读写速率：10Mbyte/s ◎最大10个堆叠的卡（20MHz,Vcc=2.7-3.6V) ◎数据寿命：10万次编程/擦除 ◎CE和FCC认证◎PIP封装技术 ◎尺寸：24mm宽×32mm长×1.44mm厚 说明： 本SD卡高度集成闪存，具备串行和随机存取能力。可以通过专用优化速度的串行接口访问，数据传输可靠。接口允许几个卡垛叠，通过他们的外部连接。接口完全符合最新的消费者标准，叫做SD卡系统标准，由SD卡系统规范定义。SD卡系统是一个新的大容量存储系统，基于半导体技术的变革。 它的出现，提供了一个便宜的、结实的卡片式的存储媒介，为了消费多媒体应用。SD卡可以设计出便宜的播放器和驱动器而没有可移动的部分。 一个低耗电和广供电电压的可以满足移动电话、电池应用比如音乐播放器、个人管理器、掌上电脑、电子书、电子百科全书、电子词典等等。 使用非常有效的数据压缩比如MPEG，SD卡可以提供足够的容量来应付多媒体数据。 框图： SD卡上所有单元由内部时钟发生器提供时钟。接口驱动单元同步外部时钟的DAT和CMD信号到内部所用时钟。 本卡由6线SD卡接口控制，包括：CMD,CLK,DAT0-DAT3。 在多SD卡垛叠中为了标识SD卡，一个卡标识寄存器(CID)和一个相应地址寄存器（RCA）预先准备好。 一个附加的寄存器包括不同类型操作参数。 这个寄存器叫做CSD。
SD卡详细中文资料
SD卡管脚定义及C语言讲解（1）SD卡的引脚定义： SD卡引脚功能详述： 引脚编号SD模式SPI模式 名称类型描述名称类型描述 1CD/DAT3IO或PP卡检测/ 数据线3 #CS I片选 2CMD PP命令/ 回应 DI I数据输入3V SS1S电源地VSS S电源地4V DD S电源VDD S电源 5CLK I时钟SCLK I时钟 6V SS2S电源地VSS2S电源地7DAT0IO或PP数据线0DO O或PP数据输出8DAT1IO或PP数据线1RSV 9DAT2IO或PP数据线2RSV 注：S：电源供给I：输入O：采用推拉驱动的输出 PP：采用推拉驱动的输入输出
SD卡SPI模式下与单片机的连接图： SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD 卡进行读写时一般都采用SPI模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI方式。这里只对其SPI方式进行介绍。 （2）SPI方式驱动SD卡的方法 SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。SPI接口的选用是在上电初始时向其写入第一个命令时进行的。以下介绍SD卡的驱动方法，只实现简单的扇区读写。 1）命令与数据传输 1.命令传输 SD卡自身有完备的命令系统，以实现各项操作。命令格式如下： 命令的传输过程采用发送应答机制，过程如下：
SD卡引脚及spi模式基本操作过程
SD卡引脚及spi模式基本操作过程 （摘自网络） 对于SD卡的硬件结构，在官方的文档上有很详细的介绍，如SD卡内的存储器结构、存储单元组织方式等内容。要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD卡的扇区读写，并对其读写速度进行了评估。下面先来讲解SD卡的读写时序。 SD卡的引脚定义 SD卡引脚功能详述： 引脚编号 SD模式SPI模式 名称类型描述名称类型描述 1 CD/DAT3 IO或PP 卡检测/ 数据线3 #CS I 片选 2 CMD PP 命令/ 回应 DI I 数据输入 3 VSS1 S 电源地VSS S 电源地 4 VDD S 电源VDD S 电源 5 CLK I 时钟SCLK I 时钟 6 VSS2 S 电源地VSS2 S 电源地 7 DAT0 IO或PP 数据线0 DO O或PP 数据输出 8 DAT1 IO或PP 数据线1 RSV 9 DAT2 IO或PP 数据线2 RSV 注：S：电源供给I：输入O：采用推拉驱动的输出 PP：采用推拉驱动的输入输出 SD卡SPI模式下与单片机的连接图：
SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI 方式。这里只对其SPI方式进行介绍。 SPI方式驱动SD卡的方法 SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。SPI接口的选用是在上电初始时向其写入第一个命令时进行的。以下介绍SD卡的驱动方法，只实现简单的扇区读写。 1）命令与数据传输 1. 命令传输 SD卡自身有完备的命令系统，以实现各项操作。命令格式如下： 命令的传输过程采用发送应答机制，过程如下：
SD卡引脚 电路图及工作原理介绍
SD卡引脚电路图及工作原理介绍 SD卡在现在的日常生活与工作中使用非常广泛，时下已经成为最为通用的数据存储卡。在诸如MP3、数码相机等设备上也都采用SD卡作为其存储设备。SD卡之所以得到如此广泛的使用，是因为它价格低廉、存储容量大、使用方便、通用性与安全性强等优点。既然它有着这么多优点，那么如果将它加入到单片机应用开发系统中来，将使系统变得更加出色。这就要求对SD卡的硬件与读写时序进行研究。对于SD卡的硬件结构，在官方的文档上有很详细的介绍，如SD卡内的存储器结构、存储单元组织方式等内容。要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD卡的扇区读写，并对其读写速度进行了评估。下面先来讲解SD卡的读写时序。 （1）SD卡的引脚定义： SD卡引脚功能详述： 引脚编号SD模式SPI模式 名称类型描述名称类型描述 1 CD/DAT3 IO或PP 卡检测/ 数据线3 #CS I 片选 2 CMD PP 命令/ 回应 DI I 数据输入 3 V SS1S 电源地VSS S 电源地 4 V DD S 电源VDD S 电源 5 CLK I 时钟SCLK I 时钟 6 V SS2S 电源地VSS2 S 电源地
7 DAT0 IO或PP 数据线0 DO O或PP 数据输出 8 DAT1 IO或PP 数据线1 RSV 9 DAT2 IO或PP 数据线2 RSV 注：S：电源供给I：输入O：采用推拉驱动的输出 PP：采用推拉驱动的输入输出 SD卡SPI模式下与单片机的连接图： SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI方式。这里只对其SPI方式进行介绍。 （2）SPI方式驱动SD卡的方法 SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。SPI接口的选用是在上电初始时
SD卡引脚定义 电路 基本原理
SD卡在现在的日常生活与工作中使用非常广泛，时下已经成为最为通用的数据存储卡。在诸如MP3、数码相机等设备上也都采用SD卡作为其存储设备。SD卡之所以得到如此广泛的使用，是因为它价格低廉、存储容量大、使用方便、通用性与安全性强等优点。既然它有着这么多优点，那么如果将它加入到单片机应用开发系统中来，将使系统变得更加出色。这就要求对SD卡的硬件与读写时序进行研究。对于SD卡的硬件结构，在官方的文档上有很详细的介绍，如SD卡内的存储器结构、存储单元组织方式等内容。要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD卡的扇区读写，并对其读写速度进行了评估。下面先来讲解SD卡的读写时序。 （1）SD卡的引脚定义： SD卡引脚功能详述：
SD卡SPI模式下与单片机的连接图： SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI方式。这里只对其SPI方式进行介绍。 （2） SPI方式驱动SD卡的方法 SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI 控制器，不光给开发上带来方便，同时也见降低了开发成本。然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD方式，因为它提供更大的总线数据带宽。SPI接口的选用是在上电初始时向其写入第一个命令时进行的。以下介绍SD卡的驱动方法，只实现简单的扇区读写。 1）命令与数据传输 1. 命令传输 SD卡自身有完备的命令系统，以实现各项操作。命令格式如下： 命令的传输过程采用发送应答机制，过程如下： 每一个命令都有自己命令应答格式。在SPI模式中定义了三种应答格式，如下表所示：
SD卡引脚及spi模式基本操作过程
S D卡引脚及s p i模式 基本操作过程 SANY GROUP system office room 【SANYUA16H-
注：S：电源供给I：输入O：采用推拉驱动的输出 PP：采用推拉驱动的输入输出 SD卡SPI模式下与单片机的连接图： SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。
写命令的例程： C程序 //-------------------------------------------------------------------------向SD卡中写入命令，并返回回应的第二个字节 //-------------------------------------------------------------------------unsignedchar Write_Command_SD(unsignedchar*CMD) { unsignedchar tmp; unsignedchar retry=0; unsignedchar i; //禁止SD卡片选 SPI_CS=1; //发送8个时钟信号 Write_Byte_SD(0xFF); //使能SD卡片选 SPI_CS=0; //向SD卡发送6字节命令 for(i=0;i<0x06;i++) { Write_Byte_SD(*CMD++); }
SD卡引脚及spi模式基本操作过程
S D卡引脚及s p i模式基 本操作过程 集团企业公司编码：（LL3698-KKI1269-TM2483-LUI12689-ITT289-
注：S：电源供给I：输入O：采用推拉驱动的输出PP：采用推拉驱动的输入输出 SD卡SPI模式下与单片机的连接图：
SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI 模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI方式。这里只对其SPI方式进行介绍。 SPI方式驱动SD卡的方法 SD卡的SPI通信接口使其可以通过SPI通道进行数据读写。从应用的角度来看，采用SPI接口的好处在于，很多单片机内部自带SPI控制器，不光给开发上带来方便，同时也见降低了开发成本。然而，它也有不好的地方，如失去了SD卡的性能优势，要解决这一问题，就要用SD 方式，因为它提供更大的总线数据带宽。SPI接口的选用是在上电初始时向其写入第一个命令时进行的。以下介绍SD卡的驱动方法，只实现简单的扇区读写。 1）命令与数据传输 1.命令传输 SD卡自身有完备的命令系统，以实现各项操作。命令格式如下： 命令的传输过程采用发送应答机制，过程如下： 每一个命令都有自己命令应答格式。在SPI模式中定义了三种应答格式，如下表所示：
写命令的例程：
C程序 //------------------------------------------------------------------------- 向SD卡中写入命令，并返回回应的第二个字节 //------------------------------------------------------------------------- unsignedchar Write_Command_SD(unsignedchar*CMD) { unsignedchar tmp; unsignedchar retry=0; unsignedchar i; //禁止SD卡片选 SPI_CS=1; //发送8个时钟信号 Write_Byte_SD(0xFF); //使能SD卡片选 SPI_CS=0; //向SD卡发送6字节命令 for(i=0;i<0x06;i++) { Write_Byte_SD(*CMD++); }
SD卡接口设计
SD卡接口设计 时间：2011-11-21 20:59:04 来源：作者： 1 SD卡标准 SD卡标准是SD卡协会针对可移动存储设备设计专利并授权的一种标准，主要用于制定卡的外形尺寸、电气接口和通信协议。 1．1 SD卡引脚功能 SD卡的外形如图1所示，引脚功能如表1所列。SD卡的引脚具有双重功能，既可工作在SD模式，也可工作在SPI模式。不同的模式下，引脚的功能不同。 SD模式多用于对SD卡读写速度要求较高的场合，SPI模式则是以牺牲读写速度换取更好的硬件接口兼容性。由于SPI协议是目前广泛流行的通信协议，大多数高性能单片机都配备了SPI硬件接口，硬件连接相对简单，因此，在对SD卡读写速度要求不高的情况下，采用SPI模式无疑是一个不错的选择。 1．2 SPI模式 SPI模式是一种简单的命令响应协议，主控制器发出命令后，SD卡针对不S同的命令返
回对应的响应。 SD卡的命令列表都是以CMD和ACMD开头，分别指通用命令和专用命令，后面接命令的编号。例如，CMD17就是一个通用命令，用来读单块数据。 在SPI模式中，命令都是以如下的6字节形式发送的： 每帧命令都以“01”开头，然后是6位命令号和4字节的参数(高位在前，低位在后)，最后是7位CRC校验和1位停止位“1”。 SD卡的每条命令都会返回对应的响应类型。在SPI模式下，共有3种响应类型：R1、R2和R3，分别占1、2和3个字节。这里仅列出了R1响应的格式，如表2所列。当出现表中所描述的状态时，相应的位置1。R2和R3的第1个字节格式与R1完全一样，详细内容请参考SD卡标准。 2 硬件设计 本设计选用Freescale公司的32位低功耗微控制器MCF51QE128，采用SPI模式实现与SD卡的接口。 由于MCF51QE128是一款低功耗的微控制器，工作电压的典型值为3．6 V，与SD卡的
SD卡引脚定义及命令
SD卡引脚定义 针脚名称类型描述 1.CD DAT3 I/O/PP 卡监测数据位3 2.CMD PP 命令/回复 3. Vss S 地 4.Vcc S 供电电压 5.CLK I 时钟 6.Css2 S 地 7.DAT0 I/O/PP 数据位0 8.DAT1 I/O/PP 数据位1 9.DAT2 I/O/PP 数据位2 SD卡接口标准规范 SD卡上所有单元由内部时钟发生器提供时钟。接口驱动单元同步外部时钟的DAT和CMD信号到内部所用时钟。本卡由6线SD卡接口控制， 包括：CMD,CLK,DAT0-DAT3。 在多SD卡垛叠中为了标识SD卡，一个卡标识寄存器(CID)和一个相应地址寄存器（RCA）预先准备好。 一个附加的寄存器包括不同类型操作参数。这个寄存器叫做CSD。使用SD卡线访问存储器还是寄存器的通信由SD卡标准定义。 卡有自己的电源开通检测单元。无需附加的主复位信号来在电源开启后安装卡。它防短路，在带电插入或移出卡时。无需外部编程电压。编程电压卡内生成。 SD卡支持第二接口工作模式SPI。如果接到复位命令（CMD0）时，CS信号有效（低电平），SPI 模式启用。
SD卡接口规范(完整规范标准) 特性： ◎容量：32MB/64MB/128MB/256MB/512MB/1GByte ◎兼容规范版本1.01 ◎卡上错误校正 ◎支持CPRM ◎两个可选的通信协议：SD模式和SPI模式 ◎可变时钟频率0－25MHz ◎通信电压范围：2.0-3.6V工作电压范围:2.0-3.6V ◎低电压消耗：自动断电及自动睡醒，智能电源管理 ◎无需额外编程电压 ◎卡片带电插拔保护 ◎正向兼容MMC卡 ◎高速串行接口带随即存取－－－支持双通道闪存交叉存取－－－快写技术：一个低成本的方案，能够超高速闪存访问和高可靠数据存储－－－最大读写速率：10Mbyte/s ◎最大10个堆叠的卡（20MHz,Vcc=2.7-3.6V) ◎数据寿命：10万次编程/擦除 ◎CE和FCC认证 ◎PIP封装技术
SD卡在单片机上的应用以及SD卡引脚 电路图及工作原理介绍
SD 卡在现在的日常生活与工作中使用非常广泛，时下已经成为最为通用的数据存储卡。在诸如MP3、数码相机等设备上也都采用SD 卡作为其存储设备。SD 卡之所以得到如此广泛的使用，是因为它价格低廉、存储容量大、使用方便、通用性与安全性强等优点。既然它有着这么多优点， 那么如果将它加入到单片机应用开发系统中来，将使系统变得更加出色。这就要求对SD 卡的硬件与读写时序进行研究。对于SD 卡的硬件结构，在官方的文档上有很详细的介绍，如SD 卡内的存储器结构、存储单元组织方式等内容。要实现对它的读写，最核心的是它的时序，笔者在经过了实际的测试后，使用51单片机成功实现了对SD 卡的扇区读写，并对其读写速度进行了评估。下面先来讲解SD 卡的读写时序。 1） SD 卡的引脚定义： SD 卡引脚功能详述： 引脚编号 SD 模式 SPI 模式 名称 类型 描述 名称 类型 描述 1 CD/DAT3 IO 或PP 卡检测/数据3 #CS I 片选 2 CMD PP 命令/回应 DI I 数据输入 3 VSS1 S 电源地 VSS S 电源地 4 VDD S 电源 VDD S 电源
5 CLK I 时钟SCLK I 时钟 6 VSS2 S 电源地VSS2 S 电源地 7 DAT0 IO或PP 数据线0 DO O或PP 数据输出 8 DAT1 IO或PP 数据线1 RSV 9 DAT2 IO或PP 数据线2 RSV 注：S：电源供给I：输入O：采用推拉驱动的输出 PP：采用推拉驱动的输入输出 SD卡SPI模式下与单片机的连接图： SD卡支持两种总线方式：SD方式与SPI方式。其中SD方式采用6线制，使用CLK、CMD、DAT0~DAT3进行数据通信。而SPI方式采用4线制，使用CS、CLK、DataIn、DataOut进行数据通信。SD方式时的数据传输速度与SPI方式要快，采用单片机对SD卡进行读写时一般都采用SPI模式。采用不同的初始化方式可以使SD卡工作于SD方式或SPI方式。这里只对其SPI方式进行介绍。 （2）SPI方式驱动SD卡的方法
SD卡原理及内部结构
1、简介： SD卡（Secure Digital Memory Card）是一种为满足安全性、容量、性能和使用环境等各方面的需求而设计的一种新型存储器件，SD卡允许在两种模式下工作，即SD模式和SPI模式，本系统采用SPI模式。本小节仅简要介绍在SPI模式下，STM32处理器如何读写SD卡，如果读者如希望详细了解SD卡，可以参考相关资料。 SD 卡内部结构及引脚如下图所示： SD卡内部图.JPG 2、SD卡管脚图：
SD卡图.JPG 3、SPI模式下SD各管脚名称为： sd 卡：
SPI模式下SD各管脚名称为.JPG 注：一般SD有两种模式：SD模式和SPI模式，管脚定义如下： （A）、SD MODE 1、CD/DATA3 2、CMD 3、VSS1 4、VDD 5、CLK 6、VSS2 7、DATA0 8、DATA1 9、DATA2 （B）、SPI MODE 1、CS 2、DI 3、VSS 4、VDD 5、SCLK 6、VSS2 7、DO 8、RSV 9、RSV SD 卡主要引脚和功能为： CLK：时钟信号，每个时钟周期传输一个命令或数据位，频率可在0～25MHz之间变化，SD卡的总线管理器可以不受任何限制的自由产生0～25MHz 的频率； CMD：双向命令和回复线，命令是一次主机到从卡操作的开始，命令可以是从主机到单卡寻址，也可以是到所有卡；回复是对之前命令的回答，回复可以来自单卡或所有卡； DAT0～3：数据线，数据可以从卡传向主机也可以从主机传向卡。 SD卡以命令形式来控制SD卡的读写等操作。可根据命令对多块或单块进行读写操作。在SPI 模式下其命令由6个字节构成，其中高位在前。SD卡命令的格式如表1所示，其中相关参数可以查阅SD卡规范。
SD卡与TF卡的引脚定义
December 2007 Rev 31/61 512 MByte and 1 GByte, 3.3V Supply Secure Digital? Card Features ■SD Memory Card Specification Version 1.01-compliant ■Up to 1 Gbyte of Formatted Data Storage ■ Bus Mode –SD Protocol (1 to 4 Data Lines)–SPI Protocol ■ Operating Voltage Range: –Basic Communication (CMD0, CMD15, CMD55 and ACMD41): 2.0V to 3.6V –Other C ommands a nd M emory A ccess: 2.7V to 3.6V ■Variable Clock Rate: 0 to 25 MHz ■Read Access (using 4 Data Lines)–Sustained Multiple Block: 6.3 Mb/s ■Write Access (using 4 Data Lines)–Sustained Multiple Block: 3.0 Mb/s ■Maximum Data Rate with up to 10 Cards ■Aimed at Portable and Stationary Applications ■ Communication Channel Protocol Attributes:–Six-wire communication channel (clock, command, 4 data lines)–Error-proof data transfer –Single or Multiple block oriented data transfer ■Memory Field Error Correction ■Safe Card Removal during Read ■Write Protect Feature using Mechanical Switch ■Built-in Write Protection Features (Permanent and Temporary) ■ SD, MiniSD and MicroSD Packages –ECOPACK ? compliant –Halogen free –Antimony free MicroSD Table 1. Device summary Part Number Package Form Factor Operating Voltage Range SMS128AF SD (full size) 2.7V to 3.6V SMS256AF SMS512AF SMS01GAF SMS064BF MiniSD SMS128BF SMS064FF MicroSD SMS128FF SMS256FF SMS512FF https://www.sodocs.net/doc/d211674677.html,
TF卡引脚定义,SD卡引脚定义
TF卡引脚定义,SD卡引脚定义 -------------------------------------------------------------------------------- TF卡引脚定义/SD卡引脚定义 什么叫TF卡: TF卡全名（TransFLash),又称T-Flash卡，全名：TransFLash，又名:Micro SD,这是Motorola 与SanDisk共同推出的记忆卡规格，它采用了最新的封装技术，并配合SanDisk最新NAND MLC技术及控制器技术.是一种超小型卡（11*15*1MM），约为SD卡的1/4，可以算目前最小的储存卡了。TF卡可经SD卡转换器后，当SD卡使用。利用适配器可以在使用SD作为存储介质的设备上使用。TransFlash主要是为照相手机拍摄大幅图像以及能够下载较大的视频片段而开发研制的。TransFlash卡可以用来储存个人数据，例如数字照片、MP3、游戏及用于手机的应用和个人数据等，还内设置版权保护管理系统，让下载的音乐、影像及游戏受保护；未来推出的新型TransFlash还备有加密功能，保护个人数据、财政纪录及健康医疗文件。体积小巧的TransFlash让制造商无须顾虑电话体积即可采用此设计，而另一项弹性运用是可以让供货商在交货前随时按客户不同需求做替换，这个优点是嵌入式闪存所没有的。 TF/SD卡规格及应用: 它的体积为15mm x 11mm x1mm ，差不多相等于手指的大小，是现时最细小的记忆卡。它也能通过SD转接卡来接驳于SD卡插槽中使用。现时MicroSD卡提供128MB、256MB、512MB、1G、2G、4G、8G、16G和32G的容量。如下图所示 详细说明： ◆体积约等于半张SIM卡，内设版权保护管理系统，适用于多项多媒体应用。 ◆搭配适配器之后，使用于附SD卡槽的数码产品上。 ◆尺寸：11mm*15mm*1mm。 ◆适用机型：MOTO E398，V8，V635，V360，A780，A840，A1000，E770，MS400，V1010，V980 /SAMSUNG M339，M329，Z300，Z500，E848 /AMOI DV6,V3/nokia 7310c 等等。 TF卡最大容量： 4G 2G 1G 512M