使用大容量STM32F10xxx的FSMC连接TFT+LCD

AN2790

Application note

TFT LCD interfacing with the

high-density STM32F10xxx FSMC

Introduction

Interactive interfaces are more and more integrated into many applications such as medical

devices, process control, mobile phones and other hand-held devices. These interfaces are

based mainly on graphic HMIs (human machine interface) using color LCDs.

Worldwide, the desire for color support is growing dramatically. The purpose of this

application note is to address this aspect by describing how to use the STM32F10xxx FSMC

(flexible static memory controller) to drive a TFT color LCD. This document first describes

how to connect a color LCD to the FSMC, then it provides a TFT LCD interfacing example.

The demonstration firmware delivered with this application note, the STM32F10xxx

firmware library, and other such firmware are available for download from the

STMicroelectronics website: https://www.sodocs.net/doc/811317546.html,.

September 2008 Rev 21/45

https://www.sodocs.net/doc/811317546.html,

Contents AN2790

Contents

1STM32F10xxx flexible static memory controller (FSMC) overview . . . 6

1.1FSMC NOR Flash/SRAM bank description . . . . . . . . . . . . . . . . . . . . . . . . 6 2TFT LCD (thin-film-transistor liquid crystal display)

interfacing with FSMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1Common color LCD interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.2Typical use of the FSMC to interface with an LCD module . . . . . . . . . . . 10

2.3Connecting the FSMC to the LCD Intel 8080-like (I80) interface . . . . . . . 10

2.4Connecting the FSMC to the LCD Motorola 6800 (M68)-like interface . . 11

2.5Interfacing an LCD with the FSMC of a High-density

STM32F10xxx device offered in a 100-pin package . . . . . . . . . . . . . . . . 12

2.6Timing computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.6.1LCD timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.6.2FSMC timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3Interfacing the Ampire AM-240320L8TNQW00H TFT

LCD with the FSMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.1Ampire TFT LCD interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.2Hardware connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3Timing computation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4Firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1LCD driver firmware description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.2Running the demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2.1Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2.2Demo startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.2.3Navigation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4.3LCD demo applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.3.1Internal Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.3.2NOR Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.3.3External SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

4.3.4NAND Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.3.5SD card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2/45

AN2790Contents 5Color TFT LCD interfacing with the FSMC: performance . . . . . . . . . . 34

6LCD demo programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.1Programming the M29W128 NOR Flash memory . . . . . . . . . . . . . . . . . . 36

6.2LCD demo programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 7Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 8Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

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List of tables AN2790 List of tables

Table 1.Advantages/drawbacks of LCD controllers in MCUs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 2.Parallel interface Read/Write status. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3.LCD Intel 8080 interface pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 4.FSMC and LCD Intel 6800 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Table 5.LCD 8080-like interface timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Table 6.FSMC and Ampire LCD pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 7.LCD 8080-like interface timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 8.Driver library description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 9.High-level LCD driver functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 10.LCD display speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 11.Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 4/45

AN2790List of figures List of figures

Figure 1.Asynchronous NOR Flash read access timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2.Asynchronous NOR Flash write access timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3.Connecting the FSMC to an LCD Intel 8080-like interface. . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 4.Connecting the FSMC to an LCD Motorola 6800-like interface . . . . . . . . . . . . . . . . . . . . . 12 Figure 5.Connecting the FSMC to an LCD Motorola 6800-like interface(1) . . . . . . . . . . . . . . . . . . . 12 Figure 6.Connecting the FSMC to an LCD Intel 8080-like interface in devices

delivered in 100-pin packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7.TFT LCD hardware connection with FSMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 8.Structure of the demonstration menus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 9.Warning message. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 10.ST logo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 11.STM32 family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 12.Main menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 13.Corresponding submenus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 14.Navigating in the demonstration menus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 15.No bitmap files (see note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 16.Copy images to the internal Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 17.Copy images to internal Flash memory complete. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 18.Animation showing the STM32F10xxx display speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 19.ST logo. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 20.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 21.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 22.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 23.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 24.Copy images to external SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 25.Copy images to external SRAM complete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 26.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 27.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 28.Copy images to the NAND Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 29.Copy images to NAND Flash complete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 30.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 31.NAND Erase operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 32.NAND Erase operation complete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 33.Copy images to SD card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 34.Copy images to SD card complete. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 35.Timing display submenu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 36.Programming the NOR Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 37.Selecting the STM32_FSMC-LCD_Demo_NORFlash.dfu file . . . . . . . . . . . . . . . . . . . . . . 37 Figure 38.Click Yes to continue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 39.NOR Flash memory programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 40.Programming the demo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 41.Selecting the STM32_FSMC-LCD_Demo.dfu file. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 42.Click Yes to continue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 43.Internal Flash memory programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 44.DFU mode left. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

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1 STM32F10xxx flexible static memory controller

(FSMC) overview

The STM32F10xxx flexible static memory controller (FSMC) is an embedded external

memory controller that allows the STM32F10xxx microcontroller to interface with a wide

range of memories, including SRAM, NOR Flash, NAND Flash and LCD modules.

The FSMC NOR Flash/SRAM bank is suitable for MCU parallel color LCD interfaces. It is

described in this section.

1.1 FSMC NOR Flash/SRAM bank description

To control a NOR Flash/SRAM memory, the FSMC provides the following features:

●Select the bank to be used to map the NOR Flash/SRAM memory: there are four

independent banks that can be used to interface with NOR Flash/SRAM/PSRAM

memories, and each bank is selected using a separate Chip Select pin.

●Enable or disable the address/data multiplexing feature

●Select the memory type to be used: NOR Flash/SRAM/PSRAM

●Define the external memory databus width: 8/16 bits

●Enable or disable the burst access mode for NOR Flash synchronous memories

●Configure the use of the wait signal: enable/disable, polarity setting and timing

configuration

●Enable or disable the extended mode: this mode is used to access the memory with

different timing configurations for read and write operations.

As the NOR Flash/PSRAM controller supports both asynchronous and synchronous

memories, the user should select only the useful parameters depending on the memory

caracteristics.

The FSMC also provides the possibility of programming several parameters to interface

correctly with the external memory. Depending on the memory type, some parameters are

not used.

If an external asynchronous memory is used, the user has to compute and set the following

parameters according to the AC timing information specified in the memory datasheet:

●ADDSET: address setup time

●ADDHOLD: address hold time

●DATAST: data setup time

●ACCMOD: access mode

This parameter gives the FSMC the flexibility to access a wide variety of asynchronous

static memories. There are four extended access modes that allow write access while

reading the memory with different timings, if the memory supports this kind of feature.

When the extended mode is enabled, the FSMC_BTR register is used for read

operations and the FSMC_BWR register is used for write operations.

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In the case where a synchronous memory is used, the user has to compute and set the following parameters:

●CLKDIV: clock divide ratio

●DATLAT: data latency

Note that NOR Flash memory read operations can be synchronous if the memory supports this mode, while write operations usually remain asynchronous.

When programming a synchronous NOR Flash memory, the memory automatically switches between the synchronous and the asynchronous mode, so in this case, all parameters have to be set correctly.

Figure1 and Figure2 show the different timings during a typical NOR Flash memory access.

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2

TFT LCD (thin-film-transistor liquid crystal display)interfacing with FSMC

2.1

Common color LCD interfaces

Dot-matrix LCD units, which are usually controlled with a Silicon embedded glass LCD

driver, can be interfaced with microcontrollers using a serial interface. This type of LCD unit has an embedded RAM for display and do not require any special microcontroller feature.Unlike dot-matrix LCD units, color LCDs need a specific controller.

The use of color LCD controllers means that each pixel needs four lines: three anolog

voltage lines for red, green and blue (horizontal) and one voltage line for selection (vertical).Typically, color LCDs can be interfaced in two ways:

●RGB interface with synchronization signals

●

MPU (microprocessor unit) interface (parallel or serial)

All graphic LCDs come with built-in drivers in the form of a chip or silicon on glass. These drivers do the conversion between RGB signals and synchronization and pixel control.Many LCDs also come with an LCD controller that does the conversion between the MPU interface and the RGB signals. Some chips are both drivers and controllers. The role of the controller is to constantly refresh the LCD.

Table 1 lists the differences between LCDs that integrate controllers and LCDs that need an MPU LCD controller.

The most common LCD MPU parallel interfaces are of the Intel 8080 (I80) and Motorola 6800 (M68) type.

The next section focusses on describing how to connect LCD Intel 8080-like and Motorola 6800-like interfaces with an STM32F10xxx FSMC.

LCD controller signals are divided into two types: data signals and control signals.

The data signals are connected to the LCD databus and depend on the LCD color depth (8 bits, 9 bits, 16 bits, 18 bits or 24 bits (true colors)).

The control signals are used to define the operation type (read or write), and whether the operation consists in addressing (writing commands to) LCD registers or the display RAM.

Table 1.

Advantages/drawbacks of LCD controllers in MCUs

LCD controller in MCU

LCD controller in LCD

External RAM is needed (cost)

RAM is included in the LCD controller

Continuous refresh of LCD causes a high power consumption and a high MCU bandwidth usage The MCU interface is active only when the LCD display changes.Good for menus and interfaces, not suitable for movies, games, high-end OS (needs an MPU architecture).

Good for menus and interfaces, not suitable for movies, games, high-end OS.

Not proven with MCU (only MPU with LCD are designed in real products).

Cost-effective QVGA (240 × 320 pixels) and below. Widely used in the appliance and industrial market.

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Table 2 describes the control signals for LCD Intel 8080-like and Motorola 6800-like interfaces.

2.2 Typical use of the FSMC to interface with an LCD module

The STM32F10xxx FSMC has four different banks of 64 Mbytes to support NOR Flash memories/PSRAMs and similar external memories.

The external memories share the addresses, data and control signals with the controller.Each external device is accessed by means of a unique Chip Select signal, but the FSMC can gain access to only one external device at a time. Each bank is configured by means of dedicated registers including the different features and the timing parameters.

As we have seen above, the FSMC provides all the signals needed by the LCD controller. The FSMC signals used for LCD interfacing are described below:

●FSMC [D0:D15]: FSMC databus: 16-bit width ●FSMC NEx: FSMC Chip Select ●FSMC NOE: FSMC Output Enable ●FSMC NWE: FSMC Write Enable

●

FSMC Ax: one address line used to select between LCD Registers and LCD Display RAM where x can be 0 to 25

Note:The prefix “N” in signal names specifies that the signal is active low.

The LCD address depends on the used FSMC NOR Flash/PSRAM bank (NEx) and the selected address (Ax) to drive the LCD RS pin.

Example: with NE2 and A4, the LCD base address will be 0x6400 0000 and 0x6400 0020; with NE4 and A0, the LCD base address will be 0x6C00 0000 and 0x6C00 0002.

2.3

Connecting the FSMC to the LCD Intel 8080-like (I80) interface

The LCD Intel 8080-like MPU interface is based on four control signals and a databus with a variabe width depending on the MPU interface capability. Table 3 describes these signals.

Table 2.

Parallel interface Read/Write status

Control 6800 processor 8080 processor

Function

RS E R/W RD RW 01101Reads registers (status)01010Writes commands to registers 11101Reads display data (RAM)1

1

1

Writes display data (RAM)

Table 3.LCD Intel 8080 interface pins

LCD signals Signal description

RS LCD Register Select

D0-D15Data D0-D15

CS Chip Select

RD Read operation: active low

WR Write operation: active low

A typical connection between FSMC and LCD Intel 8080 is illustrated on Figure 3.

2.4 Connecting the FSMC to the LCD Motorola 6800 (M68)-like

interface

The LCD Motorola 6800-like MPU interface is based on four control signals and a databus

with a variabe width depending on the MPU interface capability. Figure4 describes these

signals.

Table 4.FSMC and LCD Intel 6800 pins

LCD signals Signal description

RS LCD Register Select

D0-D15Data D0-D15

CS Chip Select

E Read Write Enable/Disable

R/W Read operation / Write operation

Figure4 illustrates a typical connection between the FSMC and an LCD Intel 6800-like

interface.

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Figure5 shows an alternative connection of an LCD Motorola 6800-like interface with the

FSMC.

(1)

1.Many LCDs have two complementary Chip Select pins.

2.5 Interfacing an LCD with the FSMC of a High-density

STM32F10xxx device offered in a 100-pin package

The STM32F101VC/D/E and STM32F103VC/D/E are High-density devices delivered in

100-pin packages. They have a reduced number of FSMC signals. Figure6 give an

overview of how to interface a color LCD with the FSMC on devices in 100-pin packages.

The NOR Flash/SRAM FSMC signals available in this package for LCD interfacing are listed

below:

●FSMC D0-D15: FSMC databus: 16-bit width

●FSMC NE1: FSMC Chip Select: Only NOR Flash/SRAM Bank1 can be used

●FSMC NOE: FSMC Output Enable

●FSMC NWE: FSMC Write Enable

●FSMC Ax: one address line used to select between LCD Registers and LCD display

RAM where x can be 16 to 23

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Figure 6.Connecting the FSMC to an LCD Intel 8080-like interface in devices

2.6 Timing

computation

As decribed above, for asynchronous NOR Flash-like memories, there are different possible

access protocols. It is first necessary to define what kind of protocol is to be used with the

user LCD. The choice depends on the different control signals and on the behavior of the

LCD during read and write transactions.

2.6.1 LCD

timings

Table5 gives the list of the main color LCD timings needed to compute the corresponding

FSMC timings.

Table 5.LCD 8080-like interface timing characteristics

Symbol Parameter Condition

t AH Address hold time RS

t AS Address setup time RS

t CYC System cycle time-

t CYC(READ)System cycle time (Read)-

t WRLW Low pulse width for write WR

t WRLR Low pulse width for read RD

t WRHW High pulse width for write WR

t WRHR High pulse width for read RD

t DS Data setup time D0-D15

t DH Data hold time D0-D15

t ACC Data access time D0-D15 (this timing depends on the load capacitance, C L)

t OD Output disable time-

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2.6.2 FSMC

timings

Usually, ModeB is used for LCD interfacing (so the extended mode is not used) and the

same timings are used for read and write operations.

In this case, the FSMC needs three timing parameters: ADDSET, DAT AST and ADDHOLD.

These parameters are computed according to the LCD characteristics and as a function of

the STM32F10xxx AHB clock (HCLK).

Based on the NOR Flash/SRAM read and write access timing diagrams illustrated in

Figure1 and Figure2, the following equations are found:

The write or read access time is the time between the falling edge and the rising edge of the

LCD Chip Select signal. This timing is computed as a function of the FSMC timing

parameter:

Write/Read access = ((ADDSET + 1) + (DATAST + 1)) × HCLK = t CYC

The DATAST parameter is measured between the falling edge and the rising edge of the

write signal in a write operation:

Write Enable signal low to high = DATAST × HCLK

To make sure of the correct timing configuration of the FSMC, the timings have to take into

consideration:

●the maximun write/read access time

●The different internal memory delays.

Hence, we have the following equations:

((ADDSET + 1) + (DATAST + 1)) × HCLK = max(t CYC, t CYC(READ))

DATAST × HCLK = t WRLW

DATAST must verify:

DATAST = (((t ACC + t AS ) + (t su(Data_NE)+ t v(A_NE)))/HCLK) – ADDSET – 4

Where:

●t su(Data_NE): FSMC_NEx low to data valid

●t v(A_NE): FSMC_NEx low to FSMC_A valid

●(t su(Data_NE)+ t v(A_NE)) = 36 ns

Note:When selecting the FSMC timing mode, make sure that the NOE behavior corresponds to the used LCD requirements. Please refer to the NOR Flash/SRAM FSMC timing diagram

description in the STM32F10xxx reference manual.

For more details on the flexible static memory controller (FSMC) timing values, please refer

to the STM32F101xC/D/E and STM32F103xC/D/E High-density datasheets.

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3

Interfacing the Ampire AM-240320L8TNQW00H TFT LCD with the FSMC

3.1

Ampire TFT LCD interface

The AM-240320L8TNQW00H TFT LCD integrates an embedded LCD controller, the

ILI9320. It can be interfaced as Intel 8080 or Motorola 6800. It has a color depth of 18 bits or 16 bits and, a resolution of 320 × 240 pixels.

In this application note, the FSMC is configured to interface the Ampire TFT LCD as follows:FSMC Bank1 NOR/PSRAM 4 is selected to support the LCD device:

●Memory type is SRAM ●Databus width 16 bits ●

Non-multiplexed memory

All remaining parameters have to be kept cleared.

3.2 Hardware connection

The Ampire TFT LCD (ILI9320 controller) is connected to the STM32F10xxx FSMC through

the FSMC bank1 NOR/PSRAM 4, which is used to control the LCD signals.

Table 6 shows the correspondence between LCD module pins and FSMC pins. All FSMC GPIOs are configured in alternate function push-pull.

Figure 7 shows a typical connection between the STM32F10xxx microcontroller and the Ampire LCD (ILI9320 controller). This connection is extracted from the shematic of the STM3210E-EVAL evaluation board.

Table 6.

FSMC and Ampire LCD pins

LCD signals FSMC signals Pin / Port assignement Signal description RS A0PF00

Address A0D0-D15D0-D15GPIOD/GPIOE Data D0-D15CS NE4PG12Chip Enable RD (E)NOE PD04Ouput Enable WR (R/W)

NWE

PD05

Write Enable

Figure 7.TFT LCD hardware connection with FSMC

computation

3.3 Timing

Table7 gives the list of the Ampire AM-240320L8TNQW00H color LCD timings needed to

compute the corresponding FSMC timings.

Table 7.LCD 8080-like interface timing characteristics

Symbol Parameter Value

t AH Address hold time 5 ns

t AS Address setup time 5 ns for Read 10 ns for Write

t CYC System cycle time100 ns

t CYC(READ)System cycle time (Read)300 ns

t WRLW Low pulse width for write50 ns

t WRLR Low pulse width for read150 ns

t WRHW High pulse width for write50 ns

t WRHR High pulse width for read150 ns

t DS Data setup time10 ns

t DH Data hold time15 ns

t ACC Data access time100 ns maximum

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Corresponding LCD FSMC timings

Using the formulas described above, we have:

●the HCLK frequency is 72 MHz

●the FSMC access mode is ModeB

So, we have the following equations:

((ADDSET + 1) + (DAT AST + 1)) × HCLK = 100 (for write cycle only as we only write to the LCD)

DATAST × 13.8 = 50

The DATAST must verify:

DATAST = ((t ACC + t AS ) + 36)/HCLK – ADDSET – 4

So, we will have the following FSMC timings:

●Address setup time: 0x1

●Address hold time: 0x0

●Data setup time: 0x5

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Firmware description AN2790

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4 Firmware description

This application note is based on:

●the STM32F10xxx firmware library

●the LCD driver firmware (offering the main functions required to control the LCD and

the display application)

●

a specific firmware to call the LCD driver functions, as well as other functions required for control and display (main.c and stm32f10x_it.c files).

The user may build any similar application using the same library and driver, and different interfacing firmware/hardware.

4.1 LCD driver firmware description

The user may interface the LCD directly through the driver application layer. The driver functions are summarized in the following sections. Table 8 presents the general driver file organization.

High-level functions

These are the functions that can simply be called by the final application to execute all needed configurations and perform high-end functionalities (LCD initialization, text writing, display of bitmap images, configuration of all the hardware components, etc.). T able 9 presents these functions. .

Table 8.

Driver library description

Files

Description

fonts.h, lcd.h, lcd.c

–LCD definitions, type definitions and function prototypes

–Basic functions (init, read, write register, write LCD RAM, set display window, write bitmap pictures, display char, clear line, clear LCD, etc.)

Table 9.

High-level LCD driver functions

Function name

Description

STM3210E_LCD_Init Initializes the LCD LCD_SetTextColor Sets the text color LCD_SetBackColor Sets the background color LCD_ClearLine Clears the selected line LCD_Clear

Clears the whole LCD

LCD_DisplayStringLine Displays a maximum of 20 char on the LCD LCD_SetDisplayWindow Sets a display window

LCD_WriteBMP

Displays a bitmap picture loaded in the internal Flash memory

AN2790Firmware description 4.2 Running the demo

4.2.1 Menu

Figure8 shows the menu system of the STM32F10xxx LCD demonstration. The main menu

is shown on the left hand side. The UP, DOWN, RIGHT and LEFT joystick directions allow

the user to navigate between items in the main menu and the submenus. T o enter a

submenu, press the SEL push-button (SEL push-button is the switch closure that occurs

when the joystick button is pushed). To exit a submenu select the Return menu and press

SEL.

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Firmware description AN2790

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4.2.2 Demo startup

After a board reset, at demo startup, the icons and bitmap files are checked in the NOR

Flash memory. All the icons have to be correctly programmed in the NOR Flash memory for the demo to start, so if an icon is missing, the demo does not start and the message shown in Figure 9 is displayed on the LCD screen.

Figure 9.

Warning message

However, if the icons are correctly loaded into the NOR Flash memory, the Welcome screen is displayed and the ST Logo appears on the LCD (see Figure

10).Figure 10.ST logo

Then, after 1 second, the STM32F10xxx slide shown in

Figure 11 is displayed on the LCD screen.

Figure 11.STM32 family

After the STM32F10xxx welcome screen, the main menu appears. It is displayed in the form of a set of icons that shows all the submenus in the same screen. Y ou can navigate using the UP , DOWN, RIGHT and LEFT joystick directions to select the desired submenu. To enter the desired submenu, press the SEL joystick push-button, and the new submenu corresponding to the selected icon is displayed.