搜档网
当前位置:搜档网 › TB31373FNG

TB31373FNG

TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic

TB31373FNG

Single Chip Receiver IC

The TB31373FNG, which realizes a reception block on a single chip, can greatly reduce the number of components comprising must functions (i.e. RF block, IF block, VCO block, PLL block), and allows for thinner, smaller devices.

Features

? Application: Remote keyless entry (remote door lock and

unlock of equipment in automotive equipment), low tire pressure detector of equipment in automotive equipment, remote controller, etc ? RF: 434 MHz, IF: 220 kHz

? Combines LNA, image rejection MIX, IF, PLL, VCO, detector circuit, and comparator block onto a single chip ? Operating voltage range: V CC = 3.6 to 5.5 V

? Current consumption: I CC = 6.4 mA (AM mode, V CC = 5.0 V)

I CC

= 6.6 mA (FM mode, V CC

= 5.0 V) ? Current consumption during BS: 0 μA (typ.) ? On-chip IF filter, detector circuit ? Package: 24-pin SSOP (0.65-mm pitch)

Block Diagram

Note: There are cases where content such as a function block, circuit, or constant will be partially omitted or simplified

in block diagrams to facilitate the explanation of functions in the diagram.

Weight: 0.14 g (typ.)

Pin Functions (all the values (resistance, capacity, etc.) shown in the internal equivalent circuit diagram are typical values.)

The equivalent circuit diagram for the pin periphery is intended to aid in understanding the connected external circuit design, not to precisely describe the internal circuit.

The equivalent circuit diagram for the pin periphery is intended to aid in understanding the connected external circuit design, not to precisely describe the internal circuit.

The equivalent circuit diagram for the pin periphery is intended to aid in understanding the connected external circuit design, not to precisely describe the internal circuit.

The equivalent circuit diagram for the pin periphery is intended to aid in understanding the connected external circuit design, not to precisely describe the internal circuit.

1. V CC , GND Supply Block Distribution

This is the block distribution of each V CC and GND pin. Because elements such as protection diodes are connected inside the IC, please use each V CC pin with identical power sources so the same electrical potential results. Also, even when using identical power sources, note that there must be no electrical

potential difference between these pins. To ensure that this is the case, take measures such as mounting a bypass capacitor next to each V CC pin having the same capacitance value.

V CC GND Block

V CC GND LNA, MIX, IF-AMP , RSSI, FIL-AMP , DATA-COMP , Detector PLL-V CC

PLL-GND

VCO, PLL, XOSC

2. Gain Distribution

The following diagram shows the distribution of each gain during reception. Each value is treated as a

rough design target value.

1. LNA Current Regulation

The current consumption and gain of LNA can be regulated by changing resistance R in the following diagram. When R = 1 k Ω, the consumption current is about 600 μA.

Figure 1

2. LNA Gain

The design value is 30dB.

3. Locally Oscillating Oscillators

Local oscillation circuits in this product have on-chip capacitance. Please use quartz oscillators with a

load capacitance of 8 pF.

4. Local Oscillation External Injection Method

When inputting an external oscillation frequency from pin 1, set the pin 1 signal level to 95 to 110dB μV . Set the pin 2 GND for external injection only from pin 1.

Figure 2

f

RF DEC

Under the standard conditions for this IC, signals are converted into 220 kHz signals in the mixer block then are input to the IF block. The frequency MIX(in) which is input from the mixer input pins is

433.9192 MHz and the local frequency is 40.6593 MHz.

This IC has an on-chip IF filter, but does not have any output pins. To measure the IF filter characteristics, measure the RSSI voltage at the RSSI pin. The frequency characteristics of the RSSI block are included in the IF filter characteristics explained in this document.

The center frequency of the standard IF filter characteristics is 220 kHz, ?3dB bandwidth is 300 kHz.

Figure 3 shows the IF filter characteristics. The filter deviation is about ±10%.

Figure 3

6. Detection Circuit

Detection is performed using the quadrature detection method. The detector is built into the IC and doesn't require an external ceramic discriminator. Demodulation output is kept at a fixed level since

adjustment can't be made using the dumping resistor.

The standard bit rate is 600 bps. Therefore, the FSK bit rate filter is a 600-bps 2nd order filter. Using a 3rd order filter is also possible. When using a bit rate other than 600 bps, please change the filter constant. You can also use two types of filters and switch between them. When switching, pin 21 and pin 24 are used for the low bit rate. (However, only 2nd order filters can be used when switching filters.)

The LPF SW is used to switch the bit rate between FSK bit rate filters. However, if you are switching the bit rate between FSK and ASK, use the AM/FM SW.

Additionally, the bit rate filter is Manchester encoded.

?Bit rate switching

Note: If you use the ASK/FSK mode, AM/FM SW and LPF SW can use connect.

(1)ASK bit rate filter

The current ASK bit rate filter is a 600-bps 2nd order filter. When using a bit rate other than 600 bps, please change the filter constant.

Table 1 2nd Order Bit Rate Filter Reference Constant (Manchester encoded)

(2)FSK bit rate filter

The current FSK bit rate filter is a 600-bps 2nd order filter. When using a bit rate other than 600 bps, please change the filter constant.

Table 2 2nd Order Bit Rate Filter Reference Constant (Manchester encoded)

(3)

Switching 2nd order bit rate filters (Manchester encoded) When using E12 series capacitors:

? Only 2nd order filters can be switched when switching bit rate filters

? Bit rate filter constants are simulation values. These values have not been confirmed through

actual measurement. ? Cut-off frequency (demodulation frequency × 1.5/demodulation frequency × 1.5)

Table 3 2nd Order Bit Rate Filter Reference Constant (Manchester encoded)

Note: The cut-off frequency is only set to demodulation frequency × 2.0 for FSK when the transfer rate is

9600 bps.

8. Quick Charge/Discharge Circuit (CHARGE pin)

The CHARGE pin (pin 11)/ the CHG Vth pin (pin 18)/ the AM Peak pin (pin 3) are quick charge/discharge pins. There are two types of quick charge/discharge function: CHARGE1 and CHARGE2. Switching is made possible by combining the control of the CHG SW pin (pin 5) and the LPF SW pin (pin 8).

The CHARGE1 function uses a time constant between the internal resistors and external capacitors to automatically quick charge/discharge the REF pin (pin 15) for a constant period of time. The CHARGE pin (11 pin) is control terminal for quick charge time. This function can be used by attaching capacitors, so be sure to attach capacitors with the same capacity as the REF pin (pin 15) during normal operation.

External capacitors with a capacitance (C20) of 0.1 μF are used, and the quick charge time is set to about 8 ms.

The control ways of the CHARGE2 function are different between in the AM mode and FM mode.

The CHARGE2 function quick charges/ discharges the REF pin (pin 15) when the difference between the input signal and the REF pin (pin 15) voltage exceeds the range of the threshold (?Vchgth to +Vchgth).

When in the FM mode, the threshold is determined by the external resistance Rchgth (R9) of the CHG Vth pin (pin 18).

For external resistance Rchgth of the CHG Vth pin (pin 18), use resistance which is considered variation of receiver and transmitter signal and within the range from 33 k Ω to 150 k Ω. Threshold Vchgth equation:

1k

Rchgth 10k

1.2 +×= Vchgth (V)

To adjust the threshold Vchgth, check the swing of REF pin (pin 15) voltage in CHRGE2 mode. If the REF pin (pin 15) voltage is big, start-up time of IC will be quick but it is disadvantage for receiver sensitivity.

To switch the bit rate between CHARGE2 functions when in the FM mode, add a switch to the external Rchgth resistance of the CHG Vth pin (pin 18).

The threshold is determined inside the IC when in the AM mode.

Please attach capacitor according to bit rate, and with 1/3 capacity at the AM Peak pin (pin 3) as the REF pin (pin 15).

Table 4 Reference Constant (Manchester encoded)

Bit Rate C4 9600 bps 0.022 μF 4800 bps

0.047 μF

9. RSSI Function

Direct current potential is output to the RSSI pin according to the input level of the IF AMP . Because the

RSSI output is converted into voltage by internal resistance, you can change the slope of the RSSI output by connecting external resistor R . In this case however, note that the difference in temperature coefficient

between external resistor R and the IC-internal resistors might cause the temperature characteristics of the RSSI output to change.

Figure 4 Figure 5

10. PLL Block

Figure 6

The PLL is composed of 1/32 fixed dividing prescalers. Additionally, it is equipped with third order loop filters. The charge pump current is 6.2 μA.

Loop Filter

Figure 7

11. VCO Block

MIX Input Level

After connecting R

12. Control Pins

(1)ENABLE bits

These are the bits that perform ENABLE control on the entire circuit.

Set Enable to “High” after V CC has completely powered up.

ENABLE Circuit

High ON

Low BS

(2)AM/FM switch

AM/FM Modulation

High FM

mode

Low AM

mode

(3)LPF switch

This bit controls the bit rate filter that is used. Please select this bit according to the bit rate.

Select the bit rate even when using the bit rate filter as a fixed filter, and select the bit according to the local oscillation (XIN1/2). However, please set LPF C1 (pin 21) and LPF C2 (pin 24) to “Open”.

XIN Operation Mode

LPF SW Bit Rate

XIN2: GND XIN2: Mount

High High bit rate XIN1 XIN2

Low Low bit rate XIN1 XIN1

Note : When not switching bit rate, it is possible to set XIN2 to “OPEN”.

(4)CHARGE switch

CHG SW LPF SW

CHARGE2

Operation Mode

CHARGE1

Operation Mode

High ON OFF

OPEN

Low OFF ON*

1

High ON OFF

Lo

Low ON ON*

1

High Test

mode*

2

*1: When not using CHARGE1, set the CHARGE pin (pin 11) to “OPEN”.

*2: Do not set CHG SW (pin 5) to High.

Example of controlling pins

Bit Rate selection X1/ X2 selection XIN1 XIN2 LPF SW

LPF C1/ C2

Use Use Mount Mount H / L Mount

Use Unnecessary Mount GND H / L Mount Unnecessary Use Mount Mount H / L OPEN Unnecessary Unnecessary

Mount

OPEN

L

OPEN

Control Timing Chart

Note :

There are cases where content such as a function block, circuit, or constant will be partially omitted or simplified in block diagrams to facilitate the explanation of functions in the diagram.

Note 1: “T-Lock” in the above diagram represents the time within which the PLL clock frequency converges to within

±1 kHz of the set value.

V

Cautions for Designing Circuit Board Patterns

Observe the following cautions when designing circuit patterns for this product.

Local Oscillation Circuit (Pins 1, 2)

?This circuit must be sufficiently isolated from the LNA block.

?The local oscillation circuit must be isolated so that it will not affect into the mixer input.

?The GND of the local oscillation circuit portion must be connected using narrow lines.

?When using two crystal oscillators, be sure to sufficiently isolate each oscillator.

Data Output Block (Pin 12)

?Be sure to isolate the output pattern so the output will not affect other circuits and no noise will be generated from any stages following the data output stage.

LNA Circuit Block

(1)Prevent LNA oscillation

?Be sure that the patterns do not get too close to the patterns of the RF input block (pin 13) and the RF-DEC block (pin 14).

?Isolate the patterns of the input block (pin 13) and the output block (pin 16).

?Design the RF input lines to be as narrow as is practical.

?Be sure there are plenty of GND patterns between the RF-IN (pin 13) and RF-DEC (pin 14).

(2)Secure gain

?To secure ample LNA gain, be sure to select the optimum value for the input matching circuit (pin

13) in accordance to the die pattern.

IC mounting block

?Be sure to provide GND underneath the mounted IC and prepare relatively many through holes.

Cautions for Mounting

?Do not mount the IC incorrectly. Incorrect mounting may result in failure, damage and/or degradation to the IC and other devices used with the IC.

?Make connection to the power pins as close as possible to prevent voltage differences in the bypass capacitor. In addition, be sure to use the correct type of capacitor with the correct capacity rating. About solderability, following conditions were confirmed

? Solderability

(1) Use of Sn-37Pb solder Bath

· solder bath temperature = 230°C

· dipping time = 5 seconds

· the number of times = once

· use of R-type flux

(2) Use of Sn-3.0Ag-0.5Cu solder Bath

· solder bath temperature = 245°C

· dipping time = 5 seconds

· the number of times = once

· use of R-type flux

Absolute Maximum Ratings (the temperature for unspecified temperature ranges is Ta = 25°C; voltage is ground referenced.)

Characteristics Symbol Rating Unit

Power supply voltage V CC 6.0 V Power dissipation P D 780 mW

Input pin voltage

AM/FM, LPF SW,

ENB, CHG SW

6.0 V Storage temperature range

T stg

?55 to 150

°C

The absolute maximum rating is a technical specification that must never be exceeded, even for an instant. Please do not operate at conditions which exceed this technical specification.

Operating Ranges (the temperature for unspecified temperature ranges is Ta = 25°C; voltage is ground referenced.)

Characteristics Symbol Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Power operating voltage range V CC ? ? 3.6 5.0 5.5 V Operating temperature range T opr ?

? -40 25 85 °C

RF operating frequency range F RF ? IF = 220 kHz 430 433.9192 435 MHz XIN setting range

OSC

? IF = 220 kHz

40.2919

40.6593

40.7606

MHz

The operating range indicates the conditions under which basic functional operation is possible even when there are

fluctuations in the electrical characteristics of a device.

Electrical Characteristics

(Unless otherwise specified, Ta = 25°C, V CC = 5.0 V, fin (RF) = 433.9192 MHz,

fin (Lo) = 40.6593 MHz, Dev = ±20 kHz, CHG SW = Open, AM/FM = H, LPF SW = L, ENB = H). RF + IF Block

Characteristics Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Current consumption when no signal (ASK mode)

I CC (ASK) 2

(1)V(Lo) = 110dB μV 4.8 6.4 8.0 mA Current consumption when no signal (FSK mode)

I CC (FSK) 2

(2)V(Lo) = 110dB μV 4.9 6.6 8.2 mA Power consumption in battery saving mode I CCO 2

(3)ENB = L ? 0 5 μA LNA gain 1 G V (RF) 1 1 (6)50 Ω I/O -9 -6 -3 dB IF (L) band IF L 1 (1)fo-3dB, RSSI pin (pin 10) ? 60 80 kHz IF (H) band

IF H

1 (1)

fo-3dB, RSSI pin (pin 10)

300

360

― kHz

RSSI output voltage 1 V RSSI1 1 (1)

V in (MIX) = 25dB μVEMF

AM/FM = L 0.25 0.5 0.75

V

RSSI output voltage 2 V RSSI2 1 (1)

V in (MIX) = 50dB μVEMF

AM/FM = L 1 1.3 1.6 V RSSI output voltage 3 V RSSI3 1 (1)

V in (MIX) = 80dB μVEMF

AM/FM = L 1.85 2.2 2.55

V

RSSI output resistance R RSSI 1 (9)

?

18 24 30 k Ω Detection output level V od 1 (3)

Dev. = ±20 kHz V in(MIX) = 60dB μVEMF 73 94 115 mVrms CHARGE2 current I CHG2

?

?

0.6 0.95 1.3 mA

Peak hold input resistance R PEAK 1(10)? 75 100 125k Ω

Characteristics Symbol

Test

Circuit

Test Condition

Min

Typ.

Max

Unit

Peak hold voltage

V PAEK ? AM Peak pin (pin 3), -5μA input

-140 -115 -90 mV CHARGE2 threshold (FSK mode) V THFM ? R9= 100 k Ω

Pin REF(pin 15), ±5μA input 185 245 305mVp-p CHARGE2 threshold (ASK mode) V THAM ? Pin LPF IN(pin 22), 0.8V input Pin REF(pin 15), ±5μA input 165 220 275

mVp-p

Waveform shaping output duty rate DR

1 (2)

V in (MIX) = 60dB μVEMF Single tone

45 50 55 %

Comparator input resistance R COMP 1 (10)? 75 100 125k Ω

Switchover switch pin input level V IL ? AM/FM, LPF SW, ENB pins 0 ? 0.2 V Switchover switch pin input level V IH

?

AM/FM, LPF SW, ENB pins

2.0 ? 5.5 V DATA output voltage (L level) V DATAL 1 (7)I DATAL = 200 μA ?

? 0.4 V

DATA output leak current (H level)

I DATAH 1 (8)

?

? 0 2 μA

Reference Characteristics Data *

Characteristics Symbol

Test

Circuit

Test Condition

Typ.Unit Reception sensitivity (12dBSINAD) 12dBSINAD 1(4)600 bps (Manchester)

No SAW filter, dev = ±20 kHz

dB μV EMF

LNA gain 2

G V (RF) 2 ? V in (RF) = 50dB μV 30 dB

LNA input capacitance C (RF) IN ? ? 2 pF LNA input resistance R (RF) IN ? ? 1.2 k Ω

Mixer conversion gain G V MIX ? V in = 50dB μV 27.5dB Mixer input resistance R MIX ? LNA OFF 0.8 k Ω Mixer input capacitance C MIX IN ? LNA OFF

2.5

pF

Mixer interception points IP3 ? ? 96 dB μV

Mixer 1dB compression 1dB comp ? Input conversion value

85

dB μV

Image reduction ratio I RR ? ? 35 dB

IF amp gain

G V (IF) ? ? 61 dB

Signal to noise ratio 1 S/N1 1(5)V in (mix) = 30dB μV, V(Lo) = 110dB μV, 600 bps (Manchester)

35 dB Signal to noise ratio 2

S/N2

1(5)V in (mix) = 60dB μV, V(Lo) = 110dB μV, 600 bps (Manchester)

53 dB

Rising time T ? CHARGE2, 9600bps (Manchester), dev=±20kHz,

Time from Vcc ON to Duty more than 40% 1 ms VCO phase noise

C/N ? @500 kHz detuning points -90 dBc/Hz VCO conversion sensitivity V VIN1 ? VCO Frequency: 434 MHz band 80 MHz/V Lockup time

PLL lock ? Local external implantation 150μs LPFC1SW pin ON resistance

R SW

?

V SW = 0.2 V

700

Ω

*: that this item contains reference values and does not contain any guaranteed values. Unit: dB μV indicates the load terminal display. (0dBm = 107dB μV = 113dB μVEMF @ 50 Ω)

Typical Test Circuit

(The components illustrated in the test circuit diagrams that follow are only used to confirm device characteristics. Toshiba does not guarantee that these components will prevent malfunction or failure in your particular application device.)

Test Circuit 1

(1) V RSSI , IF L , IF H (2) DR

SG

SG

SG

SG

F

V CC

(3) Vod

(4) 12dB SINAD

(5) S/N1, S/N2, AMR

(6) G V(RF)1 (7) V DATA L

(8) I DATA H (9)

R RSSI

* Set voltage to 0.2 V or less, then measure.

(10) R PEAK , R COMP

SG

SG

FSK Mode

ASK Mode

SG

SG

CC

CC

Test Circuit 2

(1) Iccq FM

(2) Iccq AM

(3) Icco

F

SG

F SG

F

SG

Quiescent Current Consumption vs. Power Supply Voltage Characteristics

Quiescent Current Consumption vs.

Power Supply Voltage Characteristics FM Mode

Power supply voltage V CC (V)

Power supply voltage V CC (V)

Q u i e s c e n t c u r r e n t

c o n s u m p t i o n I C C (m A )

Q u i e s c e n t c u r r e n t

c

o n s u m p t i

o n I C C q f m (

m A )

Quiescent Current Consumption vs.

Power Supply Voltage Characteristics AM Mode

RSSI Output Voltage Characteristics

(MIX, RF input)

Power supply voltage V CC (V)

Input level V IN (dB μV EMF )

Q u i e s c e n t c u r r e n t

c o n s u m p t i o n I C C q a m (m A )

R S S I o u

t p u t v o

l t a g e V R S S I (V )

RSSI Output Voltage Characteristics

(MIX input) FM Mode

RSSI Output Voltage Characteristics

(MIX input) AM Mode

MIX IN input level V (MIX) IN (dB μV )

MIX IN input level V (MIX) IN (dB μV )

R S S I o

u t

p u t v o l t a g e V R S S I (V )

R S S I o

u t

p u t v o l t a g e V R S S I (V )

相关主题