M74HCT174RM13TR中文资料
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August 2001s
HIGH SPEED : f MAX = 56MHz (TYP.) at V CC = 4.5V s
LOW POWER DISSIPATION:I CC =4μA(MAX.) at T A =25°C
s
COMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V (MAX)
s
SYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:t PLH ? t PHL
s
PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 174
DESCRIPTION
The M74HCT174 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C 2MOS technology.
Information signals applied to D inputs are transferred to the Q output on the positive going edge of the CLOCK (CK) pulse. When the CLEAR
(CLR) input is held low, the Q outputs are held low independently of the other inputs.
All inputs are equipped with protection circuits against static discharge and transient excess voltage.
M74HCT174
HEX D-TYPE FLIP FLOP WITH CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP M74HCT174B1R SOP M74HCT174M1R
M74HCT174RM13TR TSSOP
M74HCT174TTR
M74HCT174
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
LOGIC DIAGRAM
PIN No SYMBOL NAME AND FUNCTION 1CLEAR Asynchronous Master Reset (Active Low)2, 5, 7, 10, 12, 15Q0 to Q5Flip-Flop Outputs 3, 4, 6, 11, 13, 14
D0 to D5 Data Inputs
9CLOCK Clock Input (LOW to HIGH, edge triggered)8GND Ground (0V)
16
Vcc
Positive Supply Voltage
M74HCT174
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ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
Symbol Parameter
Value Unit V CC Supply Voltage -0.5 to +7V V I DC Input Voltage -0.5 to V CC + 0.5V V O DC Output Voltage -0.5 to V CC + 0.5
V I IK DC Input Diode Current ± 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 25mA I CC or I GND DC V CC or Ground Current
± 50mA P D Power Dissipation 500(*)mW T stg Storage Temperature -65 to +150
°C T L
Lead Temperature (10 sec)
300
°C
Symbol Parameter
Value Unit V CC Supply Voltage 4.5 to 5.5V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V T op Operating Temperature
-55 to 125°C t r , t f
Input Rise and Fall Time (V CC = 4.5 to 5.5V)
0 to 500
ns
Symbol
Parameter
Test Condition
Value Unit
V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.
Max.
Min.Max.
Min.Max.
V IH High Level Input Voltage
4.5 to
5.5 2.0
2.0
2.0
V V IL Low Level Input Voltage
4.5 to
5.50.8
0.8
0.8V V OH High Level Output Voltage
4.5I O =-20 μA 4.4 4.5 4.4 4.4V
I O =-4.0 mA 4.18
4.31 4.13
4.10
V OL Low Level Output Voltage
4.5I O =20 μA 0.00.10.10.1V I O =4.0 mA 0.17
0.260.330.40I I Input Leakage Current
5.5V I = V CC or GND ± 0.1± 1± 1μA I CC Quiescent Supply Current
5.5V I = V CC or GND 44080μA ? I CC
Additional Worst Case Supply Current
5.5
Per Input pin V I = 0.5V or V I = 2.4V Other Inputs at V CC or GND I O = 0
2.0
2.9
3.0
mA
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AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6ns)
CAPACITIVE CHARACTERISTICS
1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /6 (per FLIP/FLOP)
And the total CPD when N pcs of FLIP-FLOP operate can be gained by the following equation : CPD (total) = 38 + 15 x n
Symbol
Parameter
Test Condition
Value Unit
V CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.
Typ.Max.Min.
Max.Min.
Max.t TLH t THL Output Transition
Time
4.58151922
ns t PLH t PHL Propagation Delay
Time (CLOCK - Q)
4.5182835ns t PLH t PHL Propagation Delay
Time (CLEAR - Q)
4.51828
35
42
ns f MAX Maximum Clock
Frequency
4.530
5624
MHz t W(H) t W(L)Minimum Pulse
Width (CLOCK) 4.58151922ns t W(L)Minimum Pulse Width (CLEAR) 4.58151922ns t s Minimum Set-up Time
4.52
101315ns t h Minimum Hold Time
4.5568ns t REM
Minimum Removal Time
4.5
5
55
5
ns Symbol
Parameter
Test Condition
Value Unit
V CC (V)
T A = 25°C -40 to 85°C -55 to 125°C Min.
Typ.Max.Min.
Max.Min.
Max.C IN Input Capacitance 510
10
10
pF C PD
Power Dissipation Capacitance (note 1)
68
pF
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TEST CIRCUIT
L R T = Z OUT of pulse generator (typically 50?)
WAVEFORM 1 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CLOCK), SETUP AND HOLD TIME (nD TO CLOCK), CLOCK MAXIMUM FREQUENCY
(f=1MHz; 50% duty cycle)
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WAVEFORM 2 : PROPAGATION DELAY TIME (nQ TO CLEAR)(f=1MHz; 50% duty cycle)
WAVEFORM 3 : MINIMUM PULSE WIDTH (CLEAR), MINIMUM REMOVAL TIME (CLEAR TO CLOCK)
(f=1MHz; 50% duty cycle)
M74HCT174
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