NC7S08P5X,NC7S08P5X,NC7S08P5X,NC7S08M5X,NC7S08M5X,NC7S08M5X,NC7S08M5,NC7S08M5, 规格书,Datasheet 资料

NC7S08 — TinyLogic ? HS 2-Input AND Gate

TinyLogic ? HS 2-Input AND Gate

Features

■ Space saving SOT23 or SC70 5-lead package ■ Ultra small MicroPak? Pb-Free leadless package ■ High Speed; t PD 3.5ns typ ■ Low Quiescent Power; I CC < 1μA

■ Balanced Output Drive; 2mA I OL , –2mA I OH ■ Broad V CC Operating Range; 2V–6V ■ Balanced Propagation Delays ■ Specified for 3V operation

General Description

The NC7S08 is a single 2-Input high performance CMOS AND Gate. Advanced Silicon Gate CMOS fabri-cation assures high speed and low power circuit opera-tion over a broad V CC range. ESD protection diodes inherently guard both inputs and output with respect to the V CC and GND rails. Three stages of gain between inputs and outputs assures high noise immunity and reduced sensitivity to input edge rate.

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order Number

Package Number

Product Code Top Mark

Package Description

Supplied As

NC7S08M5X MA05B 7S085-Lead SOT23, JEDEC MO-178, 1.6mm

3k Units on Tape and Reel NC7S08P5X MAA05A S085-Lead SC70, EIAJ SC-88a, 1.25mm Wide

3k Units on Tape and Reel NC7S08L6X

MAC06A

PP

6-Lead MicroPak, 1.0mm Wide

5k Units on Tape and Reel

NC7S08 — TinyLogic ? HS 2-Input AND Gate

(Top View)

Pad Assignments for MicroPak

(Top Thru View)

Pin Description

Function Table

Y = AB

H = HIGH Logic Level L = LOW Logic Level

Pin Names

Description

A, B Inputs Y Output NC

No Connect

Inputs

Output

A

B

Y

L L L L H L H L L H

H

H

NC7S08 — TinyLogic ? HS 2-Input AND Gate

Recommended Operating Conditions (1)

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.

V CC Supply Voltage –0.5V to +7.0V

I IK

DC Input Diode Current @ V IN ≤ –0.5V

@ V IN ≥ V CC +0.5V –20mA +20mA

V IN DC Input Voltage –0.5V to V CC +0.5V

I OK

DC Output Diode Current @ V OUT < –0.5V

@ V OUT > V CC +0.5V –20mA +20mA

V OUT DC Output Voltage

–0.5V to V CC + 0.5V

I OUT DC Output Sourceor Sink Current ±12.5mA I CC or I GND

DC V CC or Ground Current per Output Pin ±25mA

T STG Storage Temperature –65°C to +150°C

T J Junction Temperature

150°C T L Lead Temperature (Soldering, 10 seconds)260°C P D

Power Dissipation @ +85°C SOT23-5SC70-5

200mW 150mW

Symbol Parameter

Rating

V CC Supply Voltage 2.0V to 6.0V V IN Input Voltage 0V to V CC V OUT Output Voltage 0V to V CC

T A Operating Temperature –40°C to +85°C t r , t f

Input Rise and Fall Time V CC @ 2.0V V CC @ 3.0V V CC @ 4.5V V CC @ 6.0V 0ns to 1000ns 0ns to 750ns 0ns to 500ns 0ns to 400ns

θ JA

Thermal Resistance SOT23-5SC70-5

300°C/W 425°C/W

NC7S08 — TinyLogic ? HS 2-Input AND Gate

Voltage

3.0-6.00.7 x V CC

0.7 x V CC

V IL LOW Level Input Voltage

2.00.50

0.50V

3.0-6.00.3 x V CC

0.3 x V CC

V OH

HIGH Level Output Voltage

2.0I OH = –20μA,V IN = V IH

1.90

2.0 1.90V

3.0 2.90 3.0 2.90

4.5 4.40 4.5 4.406.0

5.90

6.0 5.903.0V IN = V IH ,I OH = –1.3mA 2.68 2.85 2.634.5V IN = V IH ,I OH = –2mA 4.18 4.35 4.136.0

V IN = V IH ,I OH = –2.6mA 5.68

5.85 5.63

V OL

LOW Level Output Voltage

2.0I OL = 20μA V IN = V IL

0.00.100.10V 3.00.00.100.104.50.00.100.106.00.0

0.100.103.0V IN = V IH or V IL ,I OH = 1.3mA 0.10.260.334.5V IN = V IH

or V IL ,I OL = 2mA 0.10.260.336.0

V IN = V IH or V IL ,I OL = 2.6mA 0.1

0.260.33I IN Input Leakage Current

6.0V IN = V CC , GND ±0.1±1.0μA I CC

Quiescent Supply Current

6.0

V IN = V CC , GND

1.0

10.0

μA

NC7S08 — TinyLogic ? HS 2-Input AND Gate

Note:

2.C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (I CCD ) at no output loading and operating at 50% duty cycle. (See Figure 2.) C PD is related to I CCD dynamic operating current by the expression: I CCD = (C PD )(V CC )(f IN ) + (I CC static).

AC Loading and Waveforms

C L includes load and stray capacitance Input PRR = 1.0 MHz; t W = 500 ns

Figure 1. AC Test Circuit

Figure 3. AC Waveforms

Figure 3

2.0C L = 50pF

201001253.01127354.5820256.0

7

1721

t TLH , t THL

Output Transition Time

5.0C L = 15pF 3.010ns

Figure 1Figure 3

2.0C L = 50pF

251251553.01635454.51125316.0

92126C IN Input Capacitance Open 210

10

pF C PD

Power Dissipation Capacitance

5.0

(2)

6

pF

Figure 2

?

HS 2-Input AND Gate Tape Dimensions inches (millimeters)

Package Tape Size Dim A Dim B Dim F Dim K o Dim P1Dim W

SC70-58mm0.093

(2.35)0.096

(2.45)

0.138 ± 0.004

(3.5 ± 0.10)

0.053 ± 0.004

(1.35 ± 0.10)

0.157

(4)

0.315 ± 0.004

(8 ± 0.1)

SOT23-58mm0.1300.1300.138 ± 0.0020.055 ± 0.0040.1570.315 ± 0.012

?

HS 2-Input AND Gate Reel Dimensions inches (millimeters)

? HS 2-Input AND Gate

Figure 4. 5-Lead SOT23, JEDEC MO-178, 1.6mm

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner 13

2LAND PATTERN RECOMMENDATION

C 0.10C

0.20

C A B

0.60 REF

0.550.35SEATING PLANE

0.25

GAGE PLANE

8°0°

NOTES: UNLESS OTHEWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, VARIATION AA,

B) ALL DIMENSIONS ARE IN MILLIMETERS. 1.45 MAX

1.300.90

0.150.05

1.90

0.95

0.500.30

3.00

2.601.701.50

2.60

0.70

1.00

SEE DETAIL A

0.220.08

C) MA05Brev5

TOP VIEW

(0.30)

?

HS 2-Input AND Gate

Figure 5. 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

? HS 2-Input AND Gate

Figure 6. 6-Lead MicroPak, 1.0mm Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package speci?cations do not expand the terms of Fairchild’s worldwide terms and conditions, speci?cally the warranty therein, which covers Fairchild products.

2. DIMENSIONS ARE IN MILLIMETERS

1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD MAC06AREVC

Notes:

3. DRAWING CONFORMS TO ASME Y1

4.5M-1994

TOP VIEW

RECOMMENED LAND PATTERN

BOTTOM VIEW

1.00

A

0.55MAX

0.05C

(0.49)(0.75)

(0.52)(0.30)6X 1X

6X PIN 1

DETAIL A

0.075 X 45CHAMFER

0.250.150.350.250.400.30

0.5

(0.05) 1.0

5X

DETAIL A

PIN 1 TERMINAL

0.400.30

0.450.35

0.100.000.10C B A 0.05

C

C

0.05C

0.050.00

5X 5X 6X

(0.13)4X

6X

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when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury of the user.2.A critical component in any component of a life support,

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PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In Design This datasheet contains the design specifications for product development.Specifications may change in any manner without notice.

Preliminary First Production This datasheet contains preliminary data;supplementary data will be

published at a later date.Fairchild Semiconductor reserves the right to

make changes at any time without notice to improve design.

NC7S08 — TinyLogic

?

HS 2-Input AND Gate