PT4685中文资料
Features
?Dual Outputs
(Independently Regulated)?Power-up/Down Sequencing ?Input Voltage Range:18V to 36V
?1500 VDC Isolation
?T emp Range: –40° to 100°C ?High Efficiency: 88%
?Fixed Frequency Operation ?Over-Current Protection (Both Outputs)
?Dual Logic On/Off Control ?Over-T emperature Shutdown ?Over-Voltage Protection (Coordinated Shutdown)?Under-Voltage Lockout
?Input Differential EMI Filter ?Solderable Copper Case ?Safety Approvals (Pending):
UL 60950
CSA 22.2 60950
20-A 24-V Input Dual Output Isolated DC/DC Converter
SLTS141A
(Revised 1/28/2002)
Pin Descriptions
+Vin: The positive input supply for the module with respect to –V in. If powering the module from a -24V telecom central office supply, this input is connected to the primary system ground.
–Vin: The negative input supply for the module, and the 0VDC reference for the EN 1, EN 2, TEMP, and AUX signals. When the module is powered from a +24V supply, this input is connected to the 24V Return. EN 1: The negative logic input that enables the module output. This pin is TTL compatible and referenced to –V in. A logic ‘0’ at this pin enables the module’s outputs. A logic ‘1’ or high impedance disables the module’s outputs. If not used, the pin must be connected to –V in.
EN 2: The positive logic input that enables the module output. This pin is TTL compatible and referenced to –V in. A logic ‘1’ or high impedance enables the module’s outputs. If not used, the pin should be left open circuit.
TEMP: This pin produces an output signal that tracks the module’s metal case temperature. The output voltage is referenced to –V in and rises approximately 10mV/°C from an intital value of 0.1VDC at -40°C (V T em p =0.5 + 0.01·T Case). The signal is available whenever the module is supplied with a valid input voltage, and is independant of the enable logic status. (Note: A load impedance of less than 1M? will adversly affect the module’s over-temperature shutdown threshold. Use a high-impedance input when monitoring this signal.)
AUX: Produces a regulated output voltage of 11.6V ±5%, which is referenced to –V in. The current drawn from the pin must be limited to 10mA. The voltage may be used to indicate the output status of the module to a primary referenced circuit, or power a low-current amplifer.
Vo1: The higher regulated output voltage, which is referenced to the COM node.
Vo2: The lower regulated output voltage, which is referenced to the COM node.
COM: The secondary return reference for the module’s two regulated output voltages. It is DC isolated from the input supply pins.
Vo1 Adjust: Using a single resistor, this pin allows Vo1 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit.
Vo2 Adjust: Using a single resistor, this pin allows Vo2 to be adjusted higher or lower than the preset value. If not used, this pin should be left open circuit.
On/Off Logic
Pin 3Pin 4Output Status
1×Off
01On
×0Off
Pin-Out Information
7Do Not Connect 8Do Not Connect 9+Vo1Pin Function
10+Vo1
11+Vo1
12+Vo1
13Vo1 Adjust
14COM
15COM
16COM
17COM
18COM
Notes:
Logic 1 =Open collector
Logic 0 = –Vin (pin 2) potential
For positive Enable function, connect pin 3
to pin 2 and use pin 4.
For negative Enable function, leave pin 4
open and use pin 3.
Note:Shaded functions indicate signals that are referenced to the input (-Vin) potential.Pin Function
19COM
20Vo2 Adjust
21+Vo
2
22+Vo
2
23+Vo
2
24+Vo
2
25Do Not Connect
26Do Not Connect
(Unless otherwise stated, T
(2)This is a fixed parameter. Adjusting Vo1 or Vo2 higher will increase the module’s sensitivity to over-voltage detection. For more information, see the
application note on output voltage adjustment.
(3)The EN1 and EN2 control inputs (pins 3 & 4) have internal pull-ups and may be controlled with an open-collector (or open-drain) transistor. Both
inputs are diode protected and can be connected to +V in. The maximum open-circuit voltage is 5.4V.
(4)Voltage output at “TEMP” pin is defined by the equation:- V TEMP = 0.5 + 0.01·T, where T is in °C. See pin descriptions for more information.
(5)See SOA curves or consult the factory for the appropriate derating.
(6)The case pins on the through-holed package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.
(See Notes A & B)
(See Notes A & B)
(See Notes A & B)
Note A: All Characteristic data in the above graphs has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B:SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.
Operating Features & System Considerations for the PT4660/PT4680 Dual-Output DC/DC Converters
Over-Current Protection
The dual-outputs of the PT4660 and PT4680 series of DC/DC converters have independent output voltage regulation and current limit control. Applying a load current in excess of the current limit threshold at either output will cause the respective output voltage to drop. However, the voltage at Vo2 is derived from Vo1. There-fore a current limit fault on Vo1 will also cause Vo2 to drop. Conversely, a current limit fault applied to Vo2 will only cause Vo2 voltage to drop, and Vo1 will remain in regulation.
The current limit circuitry incorporates a limited amount of foldback. The fault current flowing into an absolute short circuit is therefore slightly less than the current limit threshold. Recovery from a current limit fault is automatic and the converter will not be damaged by a continuous short circuit at either output.
Output Over-Voltage Protection
Each output is monitored for over voltage (OV). For fail safe operation and redundancy, the OV fault detection circuitry uses a separate reference to the voltage regulation circuits. The OV threshold is fixed, and set nominally 25% higher than the set-point output voltage. If either output exceeds the threshold, the converter is shutdown and must be actively reset. The OV protection circuit can be reset by momentarily turning the converter off. This is accomplished by either cycling one of the output enable control pins (EN1 or EN2), or by removing the input power to the converter. Note: If V o1 or Vo2 is adjusted to a higher voltage, the margin between the respective steady-state output voltage and its OV threshold is reduced. This can make the module sensitive to OV fault detection, that may result from random noise and load transients.
Over-Temperature Protection
The PT4660/80 DC/DC converters have an internal temperature sensor, which monitors the temperature of the module’s metal case. If the case temperature exceeds a nominal 115°C the converter will shut down. The converter will automatically restart when the sensed temperature returns to about 100°C. The analog voltage generated by the sensor is also made available at the
‘TEMP’ output (pin 5), and can be monitored by the host system for diagnostic purposes. Consult the ‘Pin Descrip-tions’ section of the data sheet for further information on this feature.Under-Voltage Lock-Out
The Under-Voltage Lock-Out (UVLO) circuit prevents operation of the converter whenever the input voltage to the module is insufficient to maintain output regulation. The UVLO has approximately 2V of hysterisis. This is to prevent oscillation with a slowly changing input voltage. Below the UVLO threshold the module is off and the enable control inputs, EN1 and EN2 are inoperative. Primary-Secondary Isolation
The PT4460/80 series of DC/DC converters incorporate electrical isolation between the input terminals (primary) and the output terminals (secondary). All converters are production tested to a withstand voltage of 1500VDC. The isolation complies with UL60950 and EN60950, and the requirements for operational isolation. This allows the converter to be configured for either a positive or negative input voltage source.
The regulation control circuitry for these modules is located on the secondary (output) side of the isolation barrier. Control signals are passed between the primary and secondary sides of the converter via a proprietory magnetic coupling scheme. This eliminates the use of opto-couplers. The data sheet ‘Pin Descriptions’ and
‘Pin-Out Information’ provides guidance as to which reference (primary or secondary) that must be used for each of the external control signals.
Fuse Recommendations
If desired an input fuse may be added to protect against the application of a reverse input voltage.
05101520253035
t (milliseconds)
Figure 3; Vo 1, Vo 2 Power-Up Sequence
On/Off Output Voltage Sequencing
The output voltages from the PT4660 series of DC/DC converters are independantly regulated, and are internally sequenced to meet the power-up requirements of popular microprocessor and DSP chipsets. Figure 3shows the waveforms from a PT4661 after the converter is enabled at t=0s. During power-up, the Vo 1 and Vo 2voltage waveforms typically track within 0.4V prior to Vo 2 reaching regulation. The waveforms were measured with a 5-Adc resistive load at each output, and with a 48-VDC input source applied. The converter typically produces a fully regulated output within 25ms. The actual turn-on time will vary slightly with input voltage,but the power-up sequence is independent of the load at either output.
Using the On/Off Enable Controls on the PT4660and PT4680 Series of DC/DC Converters
The PT4660 (48V input) and PT4680 (24V input) series of 75-W dual-output DC/DC converters incorporates both positive and negative logic Output Enable controls.EN1 (pin 3) is the positive enable input, and EN2 (pin 4)is the negative enable input. Both inputs are TTL logic compatible, and are electrically referenced to -V in (pin 2)on the primary (input) side of the converter. A pull-up resistor is not required, but may be added if desired.Adding a pull-up resistor from either input, up to +V in ,will not damage the converter.
Automatic (UVLO) Power-Up
Connecting EN1 (pin 3) to -V in (pin 2) and leaving EN2(pin 4) open-circuit configures the converter for auto-matic power up. (See data sheet “T ypical Application”).The converter control circuitry incorporates an “Under Voltage Lockout” (UVLO) function, which disables the converter until the minimum specified input voltage is present at ±V in . (See data sheet Specifications). The UVLO circuitry ensures a clean transition during power-up and power-down, allowing the converter to tolerate a slow-rising input voltage. For most applications EN1 and EN2, can be configured for automatic power-up.
Positive Output Enable (Negative Inhibit)
T o configure the converter for a positive enable function,connect EN1 (pin 3) to -V in (pin 2), and apply the system On/Off control signal to EN2 (pin 4). In this configura-tion, a logic ‘0’ (-V in potential) applied to pin 4 disables the converter outputs. An example of this configuration is detailed in Figure 1.
Negative Output Enable (Positive Inhibit)
T o configure the converter for a negative enable function,EN2 (pin 4) is left open circuit, and the system On/Off control signal is applied to EN1 (pin 3). A logic ‘0’ (-V in potential) must then be applied to pin 3 in order to
Figure 2; Negative Enable Configuration
Figure 1; Positive Enable Configuration
During turn-off, both outputs drop rapidly due to the discharging effect of actively switched rectifiers. The voltage at Vo 1 remains higher than Vo 2 during this pe-riod. The discharge time is typically 100μs, but will vary with the amount of external load capacitance.
enable the outputs of the converter. An example of this configuration is detailed in Figure 2. Note: The converter will only produce and output voltage if a valid input voltage is applied to ±V in .
Adjusting the Output Voltage of the PT4660 and
PT4680 Dual Output Voltage DC/DC Converters
The output voltages Vo1 and Vo2 from the PT4680 (24V Bus) and PT4660 (48V Bus) series of DC/DC converters can be independantly adjusted higher or lower than the factory trimmed pre-set voltage by up to ±10%. The adjustment requires the addition of a single external resistor1. T able 1 gives the adjustment range of Vo1 and Vo2 for each model in the series as V a(min) and V a(max).
Vo1 Adjust Down: Add a resistor (R1), between pin 13
(V1 Adj) and pin 12 (Vo1) 2.
Vo1 Adjust Up: T o increase the output, add a resistor R2 between pin 13 (V1 Adj) and pin 14 (COM) 2, 4.
Vo2 Adjust Down: Add a resistor (R3) between pin 20
(V2 Adj) and pin 21 (Vo2) 2.
Vo2 Adjust Up: Add a resistor R4 between pin 20
(V2 Adj) and pins 19 (COM) 2, 4.
Refer to Figure 1 and T able 2 for both the placement and value of the required resistor.
Notes:
1.Adjust resistors are not required if Vo1 and Vo2 are to
remain at their respective nominal set-point voltage.
In this case, V1 Adj (pin 13) and V2 Adj (pin 20) are left open-circuit
https://www.sodocs.net/doc/133895805.html,e only a single 1% resistor in either the (R1) or R2
location to adjust Vo1, and in the (R3) or R4 location to adjust Vo2. Place the resistor as close to the DC/ DC/DC converter as possible.
Figure 13.Vo2 must always be at least 0.3V lower than Vo1.
4.The over-voltage protection threshold is fixed, and is set
nominally 25% above the set-point output voltage.
Adjusting Vo1 or Vo2 higher will reduce the voltage margin between the respective steady-state output
voltage and its over-voltage (OV) protection threshold.
This could make the module sensitive to OV fault
detection, as a result of random noise and load
transients.
Note: An OV fault is a latched condition that shuts down both outputs of the converter. The fault can only be cleared by cycling one of the Enable control pins (EN1* / EN2), or by momentarily removing the input power to the module.
5.Never connect capacitors to either the Vo1 Adjust or
Vo2 Adjust pins. Any capacitance added to these
control pins will affect the stability of the respective regulated output.
The adjust up and adjust down resistor values can also be calculated using the following formulas. Be sure to select the correct formula parameter from T able 1 for the out-put and model being adjusted.
(R1) or (R3)= K o (V a – V r )– R s k?
V r (V o – V a)
R2 or R4= K o– R s k?
V a – V o
Where:V o= Original output voltage, (Vo1 or Vo2) V a= Adjusted output voltage
V r= The reference voltage from T able 1
K o= The multiplier constant in T able 1
R s= The series resistance from T able 1
* Inverted logic
5.5 5.0k ?5.411.2k ?5.321.6k ?5.242.4k ?5.1105.0k ?5.04.9(99.8)k ?4.8(37.4)k ?4.7(1
6.6)k ?4.6(6.2)k ?4.5
(0.0)
R 1/R 3 = (Blue), R 2/R 4 = Black
Table 2A; ADJUSTMENT RESISTOR VALUES, Vo 1
24V Bus Pt.#PT4681/7PT4682/3/5PT4688PT468648V Bus Pt.#PT4661/7PT4662/3/5PT4668PT4666Adj. Resistor (R1)/R2(R1)/R2
(R1)/R2(R1)/R2V o (nom) 5.0V 3.3V 3.3V
2.5V
V a (req’d)V a (req’d)V a (req’d)
Table 1; ADJUSTMENT RANGE AND FORMULA PARAMETERS
PT4660 & PT4680 Series
3.67.4k ?31.5k ?3.541
4.3k ?40.7k ?3.482
5.7k ?55.9k ?3.4248.6k ?8
6.3k ?3.3611
7.0k ?17
8.0k ?3.33.24(112.0k ?)(4
9.1k ?)3.18(43.6k ?)(19.9k ?)3.12(20.8k ?)(10.1k ?)3.06(9.3k ?)(5.2k ?)3.0
(2.5k ?)
(2.3k ?)
1.959.4k ?1.915.7k ?1.8534.7k ?1.81.75(3.0)k ?
1.71.65TBD 1.6TBD 1.55TBD 1.51.45(TBD)1.4(TBD)1.35(TBD)
1.3 3.0k ?1.275 5.5k ?1.2510.3k ?1.22524.8k ?1.21.175(23.6)k ?1.15(9.1)k ?1.125(4.3)k ?1.1
(1.8)k ?
Table 2B; ADJUSTMENT RESISTOR VALUES, Vo 2
24V Bus Pt.#PT4681PT4682PT4683/6/7PT4685PT468848V Bus Pt.#PT4661PT4662PT4663/6/7PT4665PT4668Adj. Resistor (R3)/R4(R3)/R4(R3)/R4
(R3)/R4(R3)/R4V o (nom) 3.3V 2.5V
1.8V 1.5V
1.2V
V a (req’d)V a (req’d)3.6 1.0k ?3.54 2.5k ?3.48 5.0k ?3.4210.0k ?3.3625.0k ?3.33.24(29.8)k ?3.18(11.8)k ?3.12(5.8)k ?3.06(2.8)k ?3.0(1.0)k ?
2.75 4.7k ?2.7 6.7k ?2.6510.0k ?2.616.7k ?2.5536.7k ?2.52.45(22.0)k ?2.4(8.7)k ?2.35(4.2)k ?2.3(2.0)k ?2.25
(0.7)k ? 2.75 5.0k ?2.711.2k ?2.6521.6k ?2.642.4k ?2.55105.0k ?2.52.45(99.8k ?)2.4(37.4k ?)2.35(16.6k ?)2.3(6.2k ?)2.25
(0.0k ?)
PACKAGING INFORMATION
Orderable Device Status(1)Package
Type Package
Drawing
Pins Package
Qty
Eco Plan(2)Lead/Ball Finish MSL Peak Temp(3)
PT4681A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4681C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4681N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
PT4682A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4682C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4682N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
PT4683A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4683C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4683N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
PT4685A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4685C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4685N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
PT4686A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4686C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4686N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
PT4687A ACTIVE SIP MOD
ULE
EKA266TBD Call TI Level-1-215C-UNLIM
PT4687C ACTIVE SIP MOD
ULE
EKC266TBD Call TI Level-3-215C-168HRS
PT4687N ACTIVE SIP MOD
ULE
EKD266TBD Call TI Level-1-215C-UNLIM
(1)The marketing status values are defined as follows:
ACTIVE:Product device recommended for new designs.
LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.
NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.
PREVIEW:Device has been announced but is not in production.Samples may or may not be available.
OBSOLETE:TI has discontinued the production of the device.
(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS)or Green(RoHS&no Sb/Br)-please check https://www.sodocs.net/doc/133895805.html,/productcontent for the latest availability information and additional product content details.
TBD:The Pb-Free/Green conversion plan has not been defined.
Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.
Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame
retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)
(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.
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